SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR

WIPO Patent Application WO/2023/279808

A1

Embodiments of the present disclosure relate to a semiconductor structure and a preparation method therefor. The semiconductor structure comprises: an electrode covering layer, located on a substrate; a first conductive structure, located on the upper surface of the electrode covering layer; and a contact structure, comprising a first contact layer and a second contact layer, the first contact layer being in contact with the first conductive structure, the bottom of the second contact layer being in contact with the top of the first contact layer, and the width of the first contact layer being greater than the width of the bottom of the second contact layer. The lower surface of the contact structure is not lower than the lower surface of the electrode covering layer; the resistivity of the first conductive structure is not greater than the resistivity of the contact structure, and is not greater than the resistivity of the electrode covering layer. The contact area between the contact structure and the electrode covering layer is increased, the formation of a cavity in the contact structure is avoided, the contact resistance is reduced, and the bulk resistance between the contact structure and a capacitor structure below the electrode covering layer is reduced.

YANG CHENG-JER (CN)

PCT/CN2022/088471

January 12, 2023

April 22, 2022

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CHANGXIN MEMORY TECH INC (CN)

H01L21/768; H01L23/48; H01L23/528

CN113053807A	2021-06-29
CN1637566A	2005-07-13
CN109065501A	2018-12-21
US20090072286A1	2009-03-19
KR20030002872A	2003-01-09

ADVANCE CHINA IP LAW OFFICE (CN)

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