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Patent Searching and Data


Title:
SHIFT REGISTER, SCAN SIGNAL LINE DRIVER CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2013/089071
Kind Code:
A1
Abstract:
The purpose of the present invention is to reduce the circuit scale of a shift register. A shift register includes a holding circuit (11) and a clock output circuit (12) in each stage. The clock output circuit (12) has an output terminal (O) that outputs a high-level or a low-level signal on the basis of at least one output (Q) from the holding circuit (11) and a second clock signal. The holding circuit (11) performs a reset operation on the basis of a first clock signal that is applied to a transistor (N1).

Inventors:
MURAKAMI YUHICHIROH
SASAKI YASUSHI
YAMAGUCHI TAKAHIRO
Application Number:
PCT/JP2012/081958
Publication Date:
June 20, 2013
Filing Date:
December 10, 2012
Export Citation:
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Assignee:
SHARP KK (JP)
MURAKAMI YUHICHIROH
SASAKI YASUSHI
YAMAGUCHI TAKAHIRO
International Classes:
G11C19/28; G09G3/20; G09G3/36; G11C19/00
Domestic Patent References:
WO2010146756A12010-12-23
WO2010146751A12010-12-23
WO2010146752A12010-12-23
WO2013002228A12013-01-03
Foreign References:
JP2005228459A2005-08-25
Attorney, Agent or Firm:
HARAKENZO WORLD PATENT & TRADEMARK (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
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