PRIORITY CLAIM

[0001] This application claims priority to U.S. provisional patent application 62/894,905 filed Sept. 2, 2019, and U.S. patent application 16/777,480 filed Jan. 30, 2020 which are hereby incorporated herein by reference.

BACKGROUND

[0002] Limitations and disadvantages of conventional approaches to pulse generation systems will become apparent to one of skill in the art, through comparison of such approaches with some aspects of the present method and system set forth in the remainder of this disclosure with reference to the drawings.

BRIEF SUMMARY

[0003] Methods and systems are provided for a software-defined pulse orchestration platform, substantially as illustrated by and/or described in connection with at least one of the figures, as set forth more completely in the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] FIG. 1 shows an example pulse orchestration platform.

[0005] FIGS. 2A and 2B compare some aspects of classical (binary) computing and quantum computing.

[0006] FIG. 2C shows an example use of the pulse orchestration platform for controlling a quantum system.

[0007] FIG. 3A shows an example quantum orchestration platform (QOP) architecture in accordance with various example implementations of this disclosure.

[0008] FIG. 3B shows an example implementation of the quantum controller circuitry of FIG. 3A. [0009] FIG. 4 shows an example implementation of the pulser of FIG. 3B.

[0010] FIG. 5 shows an example implementation of the pulse operations manager and pulse operations circuitry of FIG. 3B.

[0011] FIG. 6A shows frequency generation circuitry of the quantum controller of FIG. 3B.

[0012] FIG. 6B shows example components of the control signal of FIG. 6A.

[0013] FIG. 7 shows an example implementation of the digital manager of FIG. 3B.

[0014] FIG. 8 shows an example implementation of the digital manager of FIG. 3B.

[0015] FIG. 9A illustrates configuration and control of the quantum controller via the quantum programming subsystem.

[0016] FIG. 9B illustrates an example implementation of the compiler of FIG. 9A.

[0017] FIGS. 10A-10C show an example quantum machine specification.

[0018] FIG. 11 is a flow chart showing an example operation of the QOP.

[0019] FIGS. 12A shows a portion of a quantum machine configured to perform a Power Rabi calibration.

[0020] FIGS. 12B shows the result of a Power Rabi calibration.

[0021] FIGS. 13A and 13B illustrate the modular and reconfigurable nature of the QOP. DETAILED DESCRIPTION

[0022] FIG. 1 shows a pulse orchestration platform. The system comprises a programming subsystem 252, a pulse controller 260, and a pulse target 258.

[0023] The programming subsystem 252 comprises circuitry operable to generate pulse program description 256 which configures the pulse controller 260 and includes instructions the pulse controller 260 can execute to carry out the pulse program (i.e., generate the necessary outbound pulse(s) 253, process feedback generated in response to the pulse(s) and received via channel 208, and/or process inbound pulses 215) with little or no human intervention during runtime. In an example implementation, the programming subsystem 252 is a personal computer comprising a processor, memory, and other associated circuitry (e.g., an x86 or x64 chipset) having installed on it a pulse orchestration software development kit (SDK) that enables creation (e.g., by a user via a text editor, integrated development environment (IDE), and/or by automated pulse program description generation circuitry) of a high-level (as opposed to binary or "machine code") pulse program description 256. In an example implementation, the high-level pulse program description uses a high-level programming language (e.g., Python, R, Java, Matlab, etc.) simply as a "host" programming language in which are embedded the programming constructs for generating the pulse program description to be loaded into pulse controller 260.

[0024] The high-level pulse program description 256 may comprise a specification (an example of which is shown in FIGS. 10A-10C) and a program (an example program for a Power Rabi calibration is discussed below). Although the specification and program may be part of one or more larger databases and/or contained in one or more files, and one or more formats, the remainder of this disclosure will, for simplicity of description, assume the configuration data structure and the program data structure each takes the form of a plain-text file recognizable by an operating system (e.g., windows, Linux, Mac, or another OS) on which programming subsystem 252 runs. The programming subsystem 252 then compiles the high-level pulse program description 256 to a machine code version of the pulse program description 256 (i.e., series of binary vectors that represent instructions that the hardware of the pulse controller 260 can interpret and execute directly).

[0025] The programming subsystem 252 communicates with the pulse controller 260 using, for example, utilize universal serial bus (USB), peripheral component interconnect (PCIe) bus, wired or wireless Ethernet, or any other suitable communication protocol. The pulse controller 260 comprises circuitry operable to load the machine code pulse program description 256 from the programming subsystem 252. Then, execution of the machine code by the pulse controller 260 causes the pulse controller 260 to generate the corresponding outbound pulse(s) 213 and/or process return pulses 215. Depending on the pulse program to be performed, characteristics of generated outbound pulse(s) 213, and/or of processing to be performed on return pulses 215, may be predetermined at design time and/or may be determined during runtime. The runtime determination of the outbound pulses characteristics and/or inbound pulse processing may comprise performance of calculations and processing in the pulse controller 260 and/or the programing subsystem 252 during runtime of the pulse program (e.g., runtime analysis of inbound pulses 215 and/or feedback/results information received from the pulse target 258).

[0026] During runtime and/or upon completion of a pulse program performed by the pulse controller 260, the pulse controller 260 may output data/results 208 to the programming subsystem 252. In an example implementation, these results may be used to generate a new pulse program description 256 for a subsequent run of the pulse program and/or update the pulse program description during runtime.

[0027] The pulse controller 260 may comprise a plurality of interconnected, but physically distinct pulse control modules (e.g., each module being a desktop or rack mounted device) such that pulse control systems requiring relatively fewer resources can be realized with relatively fewer pulse control modules, and pulse control systems requiring relatively more resources can be realized with relatively more pulse control modules.

[0028] The target 258 can be any system with which it is desired to interact via one or more pulses. One example is where the pulse target 258 is a quantum processor. But of course there are many other types of systems where generation and processing of pulses, as enabled by the programming subsystem 252 and pulse controller 260, is advantageous.

[0029] Another example is where the pulses 213 are radar pulses, the return pulses 215 are reflections of the pulses 213, and the target 258 is an object or environment to be characterized based on characteristics of reflections 215.

[0030] Another example is where the pulse target 258 is a device or a system whose response to a pulse or series of pulses is to be tested. For example, the pulse target 258 may be a wired, wireless, or optical receiver and it is desired to test the receiver's response/performance for various pulses or pulse sequences (e.g., the pulses could be representative of desired signals and/or undesired interferers the receiver may encounter in operation). In this case, the results/feedback channel 208 may provide (to the programming subsystem 252 and/or pulse controller 260) information about the response/performance of the pulse target 258 to the pulse(s) 213, and further pulses/testing may take such feedback into account.

[0031] For clarity of description, the quantum computing use case is the one primarily used in the remainder of this disclosure. But the use of quantum-specific terminology does not limit the applicability of the concepts described in this disclosure to other use cases such as the radar and device test use cases described above. For example, references to "a quantum element" could be replaced with references to "a target," references to a "quantum machine specification" could be replaced with "machine specification," references to a " quantum controller" could be replaced with references to a "pulse controller", references to "a quantum programming subsystem" could be replaced with references to a "programming subsystem," and so on.

[0032] Classical computers operate by storing information in the form of binary digits ("bits") and processing those bits via binary logic gates. At any given time, each bit takes on only one of two discrete values: 0 (or "off") and 1 (or "on"). The logical operations performed by the binary logic gates are defined by Boolean algebra and circuit behavior is governed by classical physics. In a modern classical system, the circuits for storing the bits and realizing the logical operations are usually made from electrical wires that can carry two different voltages, representing the 0 and 1 of the bit, and transistor-based logic gates that perform the Boolean logic operations.

[0033] Shown in FIG. 2A is a simple example of a classical computer configured to a bit 102 and apply a single logic operation 104 to the bit 102. At time to the bit 102 is in a first state, at time tl the logic operation 104 is applied to the bit 102, and at time t2 the bit 102 is in a second state determined by the state at time to and the logic operation. So, for example, the bit 102 may typically be stored as a voltage (e.g., 1 Vdc for a "1" or 0 Vdc for a "0") which is applied to an input of the logic operation 104 (comprised of one or more transistors). The output of the logic gate is then either lVdc or OVdc, depending on the logic operation performed.

[0034] Obviously, a classical computer with a single bit and single logic gate is of limited use, which is why modern classical computers with even modest computation power contain billions of bits and transistors. That is to say, classical computers that can solve increasingly complex problems inevitably require increasingly large numbers of bits and transistors and/or increasingly long amounts of time for carrying out the algorithms. There are, however, some problems which would require an infeasibly large number of transistors and/or infeasibly long amount of time to arrive at a solution. Such problems are referred to as intractable. [0035] Quantum computers operate by storing information in the form of quantum bits

("qubits") and processing those qubits via quantum gates. Unlike a bit which can only be in one state (either 0 or 1) at any given time, a qubit can be in a superposition of the two states at the same time. More precisely, a quantum bit is a system whose state lives in a two dimensional Hilbert space and is therefore described as a linear combination where are two basis states, and a and b are complex numbers, usually called probability amplitudes, which satisfy Using this notation, when the qubit is measured, it will be 0 with probability and will be 1 with probability and can also be represented by two-dimensional basis vectors respectively, and then the qubit state is represented by The operations performed by the quantum gates are defined by linear algebra over Hilbert space and circuit behavior is governed by quantum physics. This extra richness in the mathematical behavior of qubits and the operations on them, enables quantum computers to solve some problems much faster than classical computers (in fact some problems that are intractable for classical computers may become trivial for quantum computers).

[0036] Shown in FIG. 2B is a simple example of a quantum computer configured to store a qubit

122 and apply a single quantum gate operation 124 to the qubit 122. At time t0 the qubit 122 is described by at time tl the logic operation 104 is applied to the qubit 122, and at time t2 the qubits 122 is described by

[0037] Unlike a classical bit, a qubit cannot be stored as a single voltage value on a wire. Instead, a qubit is physically realized using a two-level quantum mechanical system. Many physical implementations of qubits have been proposed and developed over the years with some being more promising than others. Some examples of leading qubits implementations include superconducting circuits, spin qubits, and trapped ions.

[0038] It is the job of the quantum controller to generate the precise series of external signals, usually pulses of electromagnetic waves and pulses of base band voltage, to perform the desired logic operations (and thus carry out the desired quantum algorithm). Example implementations of a quantum controller are described in further detail below.

[0039] FIG. 2C shows an example use of the pulse orchestration platform for controlling a quantum system. For this implementation, the system will be referred to as a quantum orchestration platform (QOP), the quantum programming subsystem 202 corresponds to the programming subsystem 252 of FIG 1, the quantum controller 210 corresponds to the pulse controller 210 of FIG 1, and the quantum processor 218 corresponds to the target 258 of FIG. 1.

[0040] The quantum programming subsystem 202 comprises circuitry operable to generate a pulse program description 206 which configures the quantum controller 210 and includes instructions the quantum controller 210 can execute to carry out the quantum algorithm (i.e., generate the necessary outbound quantum control pulse(s) 213) with little or no human intervention during runtime.

[0041] The quantum programming subsystem 202 is coupled to the quantum controller 210 via interconnect 204 which may, for example, utilize universal serial bus (USB), peripheral component interconnect (PCIe) bus, wired or wireless Ethernet, or any other suitable communication protocol. The quantum controller 210 comprises circuitry operable to load the machine code pulse program description 206 from the programming subsystem 202 via interconnect 204. Then, execution of the machine code by the quantum controller 210 causes the quantum controller 210 to generate the necessary outbound quantum control pulse(s) 213 that correspond to the desired operations to be performed on the quantum processor 218 (e.g., sent to qubit(s) for manipulating a state of the qubit(s) or to readout resonator(s) for reading the state of the qubit(s), etc.). Depending on the quantum algorithm to be performed, outbound pulse(s) 213 for carrying out the algorithm may be predetermined at design time and/or may need to be determined during runtime. The runtime determination of the pulses may comprise performance of classical calculations and processing in the quantum controller 210 and/or the quantum programing subsystem 202 during runtime of the algorithm (e.g., runtime analysis of inbound pulses 215 received from the quantum processor 218).

[0042] The quantum controller 210 is coupled to the quantum processor 218 via interconnect

212 which may comprise, for example, one or more conductors and/or optical fibers. The quantum controller 210 may comprise a plurality of interconnected, but physically distinct quantum control modules (e.g., each module being a desktop or rack mounted device) such that quantum control systems requiring relatively fewer resources can be realized with relatively fewer quantum control modules and quantum control systems requiring relatively more resources can be realized with relatively more quantum control modules.

[0043] The quantum processor 218 comprises K (an integer) quantum elements 122, which includes qubits (which could be of any type such as superconducting, spin qubits, ion trapped, etc.), and, where applicable, any other element(s) for processing quantum information, storing quantum information (e.g. storage resonator), and/or coupling the outbound quantum control pulses 213 and inbound quantum control pulses 215 between interconnect 212 and the quantum element(s) 122 (e.g., readout resonator(s)). In an example implementation in which the quantum processor comprises readout resonators (or other readout circuitry), K may be equal to the total number of qubits plus the number of readout circuits. That is, if each of Q (an integer) qubits of the quantum processor 218 is associated with a dedicated readout circuit, then K may be equal to 2Q. For ease of description, the remainder of this disclosure will assume such an implementation, but it need not be the case in all implementations. Other elements of the quantum processor 218 may include, for example, flux lines (electronic lines for carrying current), gate electrodes (electrodes for voltage gating), current/voltage lines, amplifiers, classical logic circuits residing on-chip in the quantum processor 218, and/or the like.

[0044] FIG. 3A shows an example quantum controller architecture in accordance with various example implementations of this disclosure. The quantum controller 210 comprises L (an integer > 1) pulser circuits 302 ₀ -302 _L-1 and shared circuitry 310.

[0045] In the example implementation shown, each pulser circuit 302i (I an integer between 0 and L-1) comprises circuitry for exchanging information over signal paths 304i, 306i, and 308i, where the signal path 308i carries outbound pulses (e.g., 213 of FIG. 2C) generated by the pulser circuit 302i (which may be, for example, control pulses sent to the quantum processor 218 to manipulate one or more properties of one or more quantum elements -e.g., manipulate a state of one or more qubits, manipulate a frequency of a qubit using flux biasing, etc., and/or readout a state of one or more quantum elements), the signal path 306i carries inbound quantum element readout pulses (e.g., 215 of FIG. 2C) to be processed by the pulser circuit 302i, and signal path 304i carries control information. Each signal path may comprise one or more conductors, optical channels, and/or wireless channels.

[0046] Each pulser circuit 302i comprises circuitry operable to generate outbound pulses on signal path 308i according to quantum control operations to be performed on the quantum processor 218. This involves very precisely controlling characteristics such as phase, frequency, amplitude, and timing of the outbound pulses. The characteristics of an outbound pulse generated at any particular time may be determined, at least in part, on inbound pulses received from the quantum processor 218 (via shared circuitry 310 and signal path 306i) at a prior time. In an example implementation, the time required to close the feedback loop (i.e., time from receiving a first pulse on one or more of paths 315 ₁ -315 _L (e.g., at an analog to digital converter of the path) to sending a second pulse on one or more of paths 313 ₀ -313 _L-1 (e.g., at an output of a digital-to-analog converter of the path), where the second pulse is based on the first pulse, is significantly less than the coherence time of the qubits of the quantum processor 218. For example, the time to close the feedback loop may be on the order of 100 nanoseconds. It should be noted that each signal path in FIG. 3A may in practice be a set of signal paths for supporting generation of multi pulse sets (e.g., two signal paths for two-pulse pairs, three signal paths for three-pulse sets, and so on).

[0047] In the example implementation shown, the shared circuitry 310 comprises circuitry for exchanging information with the pulser circuits 302 ₀ - 302 _L-1 over signal paths 304 ₀ -304 _L-1 , 306 ₀ -306 _L-1 , and 308 ₀ -308 _L-1 , where each signal path 308i carries outbound pulses generated by the pulser circuit 302i, each signal path 306i carries inbound pulses to be processed by pulser circuit 302i, and each signal path 304i carries control information such as flag/status signals, data read from memory, data to be stored in memory, data streamed to/from the quantum programming subsystem 202, and data to be exchanged between two or more pulsers 302 ₀ -302 _L . Similarly, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum processor 218 over signal paths 315 ₀ - 315 _M-1 and 313 ₁ -313 _K-1 , where each signal path 315 _m (m an integer between 0 and M-1) carries inbound pulses from the quantum processor 218, and each signal path 313 _k (k an integer between 0 and K-1) carries outbound pulses to the quantum processor 218. Additionally, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum programming subsystem over signal path 311. The shared circuitry 310 may be: integrated with the quantum controller 210 (e.g., residing on one or more of the same field programmable gate arrays or application specific integrated circuits or printed circuit boards); external to the quantum controller (e.g., on a separate FPGA, ASIC, or PCB connected to the quantum controller via one or more cables, backplanes, or other devices connected to the quantum processor 218, etc.); or partially integrated with the quantum controller 210 and partially external to the quantum controller 210.

[0048] In various implementations, M may be less than, equal to, or greater than L, K may be less than, equal to, or greater than L, and M may be less than, equal to, or greater than K. For example, the nature of some quantum algorithms is such that not all K quantum elements need to be driven at the same time. For such algorithms, L may be less than K and one or more of the L pulsers may be shared among multiple of the K quantum elements circuits. That is, any pulser may generate pulses for different quantum elements at different times. This ability of a pulser to generate pulses for different quantum elements at different times can reduce the number of pulsers 302 ₀ -302 _L-1 (i.e., reduce L) required to support a given number of quantum elements (thus saving significant resources, cost, size, overhead when scaling to larger numbers of qubits, etc.). [0049] The ability of a pulser 302i to generate pulses for different quantum elements at different times also enables reduced latency. As just one example, assume a quantum algorithm which needs to send a pulse to quantum element 122o at time Tl, but whether the pulse is to be of a first type or second type (e.g., either an X pulse or a Hadamard pulse) cannot be determined until after processing an inbound readout pulse at time T1-DT (i.e., DT time intervals before the pulse is to be output). If there were a fixed assignment of pulsers 302 ₀ -302 _L-1 to quantum elements of the quantum processor 218 (i.e., if 302 ₀ could only send pulses to quantum element 122o, and pulser 302i could only send pulses to quantum element 122i, and so on), then pulser 302 ₀ might not be able to start generating the pulse until it determined what the type was to be. In the depicted example implementation, on the other hand, pulser 302 ₀ can start generating the first type pulse and pulser 302i can start generating the second type pulse and then either of the two pulses can be released as soon as the necessary type is determined. Thus, if the time to generate the pulse is in this example the example quantum controller 210 may reduce latency of outputting the pulse by

[0050] The shared circuitry 310 is thus operable to receive pulses via any one or more of the signals paths 308 ₀ -308 _L-1 and/or 315 ₀ -315 _M-1 , process the received pulses as necessary for carrying out a quantum algorithm, and then output the resulting processed pulses via any one or more of the signal paths 306 ₀ -306 _L-1 and/or 313 ₀ -313 _K-1 . The processing of the pulses may take place in the digital domain and/or the analog domain. The processing may comprise, for example: frequency translation/modulation, phase translation/modulation, frequency and/or time division multiplexing, time and/or frequency division demultiplexing, amplification, attenuation, filtering in the frequency domain and/or time domain, time-to-frequency-domain or frequency-to-time-domain conversion, upsampling, downsampling, and/or any other signal processing operation. At any given time, the decision as to from which signal path(s) to receive one or more pulse(s), and the decision as to onto which signal path(s) to output the pulse(s) may be: predetermined (at least in part) in the pulse program description 206; and/or dynamically determined (at least in part) during runtime of the pulse program based on classical programs/computations performed during runtime, which may involve processing of inbound pulses. As an example of predetermined pulse generation and routing, a pulse program description 206 may simply specify that a particular pulse with predetermined characteristics is to be sent to signal path 313 ₁ at a predetermined time. As an example of dynamic pulse determination and routing, a pulse program description 206 may specify that an inbound readout pulse at time T- DT should be analyzed and its characteristics (e.g., phase, frequency, and/or amplitude) used to determine, for example, whether at time T pulser should output a pulse to a first quantum element or to a second quantum element or to determine, for example, whether at time T pulser 302i should output a first pulse to a first quantum element or a second pulse to the first quantum element. In various implementations of the quantum controller 210, the shared circuitry 310 may perform various other functions instead of and/or in addition to those described above. In general, the shared circuitry 310 may perform functions that are desired to be performed outside of the individual pulser circuits 302 ₀ -302 _L-1 . For example, a function may be desirable to implement in the shared circuitry 310 where the same function is needed by a number of pulser circuits from 302 ₀ -302 _L-1 and thus may be shared among these pulser circuits instead of redundantly being implemented inside each pulser circuit. As another example, a function may be desirable to implement in the shared circuitry 310 where the function is not needed by all pulser circuits 302 ₀ -302 _L-1 at the same time and/or on the same frequency and thus fewer than L circuits for implementing the function may be shared among the L pulser circuits 302 ₀ -302 _L-1 through time and/or frequency division multiplexing. As another example, a function may be desirable to implement in the shared circuitry 310 where the function involves making decisions based on inputs, outputs, and/or state of multiple of the L pulser circuits 302 ₀ -302 _L-1 , or other circuits. Utilizing a centralized coordinator / decision maker in the shared circuitry 310 may have the benefit(s) of: (1) reducing pinout and complexity of the pulser circuits 302 ₀ -302 _L-1 ; and/or (2) reducing decision-making latency. Nevertheless, in some implementations, decisions affecting multiple pulser circuits 302 ₀ -302 _L-1 may be made by one or more of the pulser circuits 302 ₀ -302 _L-1 where the information necessary for making the decision can be communicated among pulser circuits within a suitable time frame (e.g., still allowing the feedback loop to be closed within the qubit coherence time) over a tolerable number of pins/traces.

[0052] FIG. 3B shows an example implementation of the quantum controller of FIG. 2C. The example quantum controller shown comprises pulsers 302I-302 _L-1 , receive analog frontend 350, input manager 352, digital manager 354, pulse operations manager 356, pulse operations 358, output manager 360, transmit analog frontend 362, data exchange 364, synchronization manager 366, and input/output ("I/O") manager 368. Circuitry depicted in FIG. 3B other than pulser circuits 302 ₀ -302 _L-1 corresponds to an example implementation of the shared circuitry 310 of FIG. 3A.

[0053] The receive analog frontend 350 comprises circuitry operable to concurrently process up to M (an integer ³ 1) analog inbound signals (RP' ₀ -RP' _M-1 ) received via signal paths 315 ₀ -315 _M-1 to generate up to M concurrent inbound signals (RP ₀ -RP _M-1 ) to be output to input manager 352 via one or more signal paths. Although there is shown to be M signals RP and M signals RP', this need not be the case. Such processing may comprise, for example, analog-to-digital conversion, filtering, upconversion, downconversion, amplification, attenuation, time division multiplexing/demultiplexing, frequency division multiplexing/demultiplexing, and/or the like. In various implementations, M may be less than, equal to, or greater than L and M may be less than, equal to, or greater than K.

[0054] The input manager 352 comprises circuitry operable to route any one or more of signals

(RP ₀ -RP _M-1 ) to any one or more of pulsers 302 ₀ -302 _L-1 (as signal(s) and/or to other circuits (e.g. as signal io_mgr to I/O manager 368). In an example implementation, the input manager 352 comprises one or more switch networks, multiplexers, and/or the like for dynamically reconfiguring which signals RP ₀ -RP _M-1 are routed to which pulsers 302 ₀ -302 _L-1 . This may enable time division multiplexing multiple of the signals RP ₀ -RP _M-1 onto a single signal and/or time division demultiplexing components (e.g., time slices) of a signal RP _m onto multiple of the signals In an example implementation, the input manager 352 comprises one or more mixers and/or filters for frequency division multiplexing multiple of the signals RP ₀ -RP _M-1 onto a single signal Al _l and/or frequency division demultiplexing components (e.g., frequency bands) of a signal RP _m onto multiple of the signals The signal routing and multiplexing/demultiplexing functions performed by the input manager 352 enables: a particular pulser 302i to process different inbound pulses from different quantum elements at different times; a particular pulser 302i to process different inbound pulses from different quantum elements at the same time; and multiple of the pulsers 302 ₀ -302 _L-1 to processes the same inbound pulse at the same time. In the example implementation shown, routing of the signals RP ₀ -RP _M-1 among the inputs of the pulsers 302 ₀ -302 _L-1 is controlled by digital control signals in_slct ₀ -in_slct _L-1 from the pulsers 302 ₀ -302 _L-1 . In another implementation, the input manager may be operable to autonomously determine the appropriate routing (e.g., where the pulse program description 206 includes instructions to be loaded into memory of, and executed by, the input manager 352). In the example implementation, the input manager 352 is operable to rout input signals RP ₀ -RP _M-1 to the I/O manager 368 (as signal(s) io_mgr), to be sent to the quantum programing subsystem 202. This routing may, for example, be controlled by signals from the digital manager 354. In an example implementation, for each input signal RP _m there is a digital signal, strearn _m , from the digital manager 354 to the input manager 352 that controls whether RP _m will be sent from the input manager 352 to the I/O manager 368 and from there to the quantum programing subsystem 202.

[0055] Each of the pulsers 302 ₀ -302 _L-1 is as described above with reference to FIG. 3A. In the example implementation shown, each pulser 302i is operable to generate raw outbound pulses ("raw" is used simply to denote that the pulse has not yet been processed by pulse operations circuitry 358) and digital control signals and for carrying out quantum algorithms on the quantum processor 218, and resultsi for carrying intermediate and/or final results generated by the pulser 302ito the quantum programming subsystem 202. One or more of the pulsers 302 ₀ -302 _L-1 may receive and/or generate additional signals which are not shown in FIG. 3A for clarity of illustration. The raw outbound pulses CP' ₀ -CP' _L-1 are conveyed via signal paths 308 ₀ -308 _L-1 and the digital control signals are conveyed via signal paths 304 ₀ -304 _L-1 . Each of the pulsers 302i is operable to receive inbound pulse signal Al _l and signal f_dmodi. Pulser 302i may process the inbound signal Al _l to determine the state of certain quantum element(s) in the quantum processor 218 and use this state information for making decisions such as, for example, which raw outbound pulse to generate next, when to generate it, and what control signals to generate to affect the characteristics of that raw outbound pulse appropriately. Pulser may use the signal for determining how to process inbound pulse signal Ah. As an example, when pulser 302 ₁ needs to process an inbound signal Al ₁ from quantum element 122 ₃ , it can send a dmod_sclti signal that directs pulse operations manager 356 to send, on f_dmodi, settings to be used for demodulation of an inbound signal Ah from quantum element 122 ₃ (e.g., the pulse operations manager 356 may send the value cos( w ₃ * TS * T _clk1 + F ₃ ), where w ₃ is the frequency of quantum element 122 _3, TS is amount of time passed since the reference point, for instance the time at which a pulse program started running, and F ₃ is the phase of the total frame rotation of quantum element 122 ₃ , i.e. the accumulated phase of all frame rotations since the reference point).

[0056] The pulse operations circuitry 358 is operable to process the raw outbound pulses CP' ₀ -

CP' _L-1 to generate corresponding output outbound pulses CP ₀ -CP _L-1 . This may comprise, for example, manipulating the amplitude, phase, and/or frequency of the raw pulse The pulse operations circuitry 358 receives raw outbound pulses CP' ₀ -CP' _L-1 from pulsers 302 ₀ -302 _L-1 , control signals ops_cnfg ₀ - ops_cnfg _L-1 from pulse operations manager 356, and ops_ctrl ₀ -ops_ctrl _L-1 from pulsers 302 ₀ -302 _L-1 .

[0057] The control signal configures, at least in part, the pulse operations circuitry 358 such that each raw outbound pulse that passes through the pulse operations circuitry 358 has performed on it one or more operation(s) tailored for that particular pulse. To illustrate, denoting a raw outbound pulse from pulser 302 ₃ at time T1 as CP' _{3,T 1} then, at time T1 (or sometime before T1 to allow for latency, circuit setup, etc.), the digital control signal ops_cnfg3 (denoted ops_cnfg _3,T1 for purposes of this example) provides the information (e.g., in the form of one or more matrix, as described below) as to what specific operations are to be performed on pulse CP' _3,T1 - Similarly, ops_cnfg _4,T1 provides the information as to what specific operations are to be performed on pulse CP' _4,T1 , and ops_cnfg _3,T2 provides the information as to what specific operations are to be performed on pulse CP' _4,T1 . [0058] The control signal o provides another way for the pulser to configure how any particular pulse is processed in the pulse operations circuitry 358. This may enable the pulser to, for example, provide information to the pulse operation circuitry 358 that does not need to pass through the pulse operation manager 356. For example, the pulser may send matrix values calculated in real-time by the pulser to be used by the pulse operation circuitry 358 to modify pulse These matrix values arrive to the pulse operation circuitry 358 directly from the pulser and do not need to be sent to the pulse operation manager first. Another example may be that the pulser provides information to the pulse operation circuitry 358 to affect the operations themselves (e.g. the signal can choose among several different mathematical operations that can be performed on the pulse).

[0059] The pulse operations manager 356 comprises circuitry operable to configure the pulse operations circuitry 358 such that the pulse operations applied to each raw outbound pulse are tailored to that particular raw outbound pulse. To illustrate, denoting a first raw outbound pulse to be output during a first time interval T1 as and a second raw outbound pulse to be output during a second time interval T2 as then pulse operations circuitry 358 is operable to perform a first one or more operations on n and a second one or more operations on CP'in. The first one or more operations may be determined, at least in part, based on to which quantum element the pulse CP _1,T1 is to be sent, and the second one or more operations may be determined, at least in part, based on to which quantum element the pulse CP _1,T2 is to be sent. The determination of the first one or more operations and second one or more operations may be performed dynamically during runtime.

[0060] The transmit analog frontend 362 comprises circuitry operable to concurrently process up to K digital signals DO _k to generate up to K concurrent analog signals AO _k to be output to the quantum processor 218. Such processing may comprise, for example, digital-to-analog conversion, filtering, upconversion, downconversion, amplification, attenuation, time division multiplexing/demultiplexing, frequency division multiplexing/demultiplexing and/or the like. In an example implementation, each of the one or more of signal paths 313 ₀ -313 _K-1 (FIG. 3A) represents a respective portion of Tx analog frontend circuit 362 as well as a respective portion of interconnect 212 (FIG. 2C) between the Tx analog frontend circuit 362 and the quantum processor 218. Although there is one-to-one correspondence between the number of DO signals and the number of AO signals in the example implementation described here, such does not need to be the case. In another example implementation, the analog frontend 362 is operable to map more (or fewer) signals DO to fewer (or more) signals AO. In an example implementation the transmit analog frontend 362 is operable to process digital signals DO ₀ -DO _K-1 as K independent outbound pulses, as K/2 two-pulse pairs, or process some of signals DO ₀ - DO _K-1 as independent outbound pulses and some signals DO ₀ - DO _K-1 as two-pulse pairs (at different times and/or concurrently.

[0061] The output manager 360 comprises circuitry operable to route any one or more of signals

CP ₀ -CP _L-1 to any one or more of signal paths 313 ₀ -313 _K-1 . As just one possible example, signal path 313o may comprise a first path through the analog frontend 362 (e.g., a first mixer and DAC) that outputs AOo and traces/wires of interconnect 212 that carry signal AOo; signal path 313 ₁ may comprise a second path through the analog frontend 362 (e.g., a second mixer and DAC) that outputs AO ₁ and traces/wires of interconnect 212 that carry signal AOi, and so on. In an example implementation, the output manager 360 comprises one or more switch networks, multiplexers, and/or the like for dynamically reconfiguring which one or more signals CP ₀ -CP _L-1 are routed to which signal paths 313 ₀ -313 _K-1 . This may enable time division multiplexing multiple of the signals CP ₀ -CP _L-1 onto a single signal path 313 _k and/or time division demultiplexing components (e.g., time slices) of a signal CP _m onto multiple of the signal paths 313o-313 _K - ₁ . In an example implementation, the output manager 360 comprises one or more mixers and/or filters for frequency division multiplexing multiple of the signals CP ₀ -CP _M-1 onto a single signal path 313 _k and/or frequency division demultiplexing components (e.g., frequency bands) of a signal CP _m onto multiple of the signal paths 313 ₀ -313 _K-1 . The signal routing and multiplexing/demultiplexing functions performed by the output manager 360 enables: routing outbound pulses from a particular pulser 302i to different ones of the signal paths 313 ₀ -313 _K-1 at different times; routing outbound pulses from a particular pulser to multiple of the signal paths 313 ₀ -313 _K-1 at the same time; and multiple of the pulsers 302 ₀ -302 _L-1 generating pulses for the same signal path 313 _k at the same time. In the example implementation shown, routing of the signals CP ₀ -CP _L-1 among the signal paths 313 ₀ -313 _K-1 is controlled by digital control signals out_slct ₀ -out_slct _L-1 from the pulsers 302 ₀ -302 _L-1 . In another implementation, the output manager 360 may be operable to autonomously determine the appropriate routing (e.g., where the quantum pulse program description 206 includes instructions to be loaded into memory of, and executed by, the output manager 360). In an example implementation, at any given time, the output manager 360 is operable to concurrently route K of the digital signals CP ₀ -CP _L-1 as K independent outbound pulses, concurrently route K/2 of the digital signals CP ₀ -CP _L-1 as two-pulse pairs, or route some of signals CP ₀ - CP _L-1 as independent outbound pulses and some others of the signals CP ₀ -CP _L-1 as multi-pulse sets (at different times and/or concurrently).

[0062] The digital manager 354 comprises circuitry operable to process and/or route digital control signals (DigCtrl ₀ — DigCtrl _J-1 ) to various circuits of the quantum controller 210 and/or external circuits coupled to the quantum controller 210. In the example implementation shown, the digital manager receives, from each pulser 302i, (e.g., via one or more of signal paths 304 ₀ -304 _N-1 ) _{a digital signal Di that is to be processed and routed by the digital manager 354, and a control signal D} _porti that indicates to which output port(s) of the digital manager 354 the signal Di should be routed. The digital control signals may be routed to, for example, any one or more of circuits shown in FIG. 3B, switches/gates which connect and disconnect the outputs AO ₀ -AO _K-1 from the quantum processor 218, external circuits coupled to the quantum controller 210 such as microwave mixers and amplifiers, and/or any other circuitry which can benefit from on real-time information from the pulser circuits 302 ₀ -302 _L-1 . Each such destination of the digital signals may require different operations to be performed on the digital signal (such as delay, broadening, or digital convolution with a given digital pattern). These operations may be performed by the digital manager 354 and may be specified by control signals from the pulsers 302 ₀ -302 _L-1 . This allows each pulser 302i to generate digital signals to different destinations and allows different ones of pulsers

302 ₀ - 302 _L-1 to generate digital signals to the same destination while saving resources.

[0063] The synchronization manager 366 comprises circuitry operable to manage synchronization of the various circuits shown in FIG. 3B. Such synchronization is advantageous in a modular and dynamic system, such as quantum controller 210, where different ones of pulsers 302 ₀ - 302 _L-1 generate, receive, and process pulses to and from different quantum elements at different times. For example, while carrying out a quantum algorithm, a first pulser circuit 302i and a second pulser circuit 302 ₂ may sometimes need to transmit pulses at precisely the same time and at other times transmit pulses independently of one another. In the example implementation shown, the synchronization manager 366 reduces the overhead involved in performing such synchronization.

[0064] The data exchange circuitry 364 is operable to manage exchange of data among the various circuits shown in FIG. 3B. For example, while carrying out a quantum algorithm, a first pulser circuit

302 ₁ and a second pulser circuit 302 ₂ may sometimes need to exchange information. As just one example, pulser 302i may need to share, with pulser 302 ₂ , the characteristics of an inbound signal that it just processed so that pulser 302 ₂ can generate a raw outbound pulse CPh based on the characteristics of The data exchange circuitry 364 may enable such information exchange. In an example implementation, the data exchange circuitry 364 may comprise one or more registers to and from which the pulsers 302 ₀ - 302 _L-1 can read and write.

[0065] The I/O manager 368 is operable to route information between the quantum controller

210 and the quantum programming subsystem 202. Machine code quantum pulse program descriptions may be received via the I/O manager 368. Accordingly, the I/O manager 368 may comprise circuitry for loading the machine code into the necessary registers/memory (including any SRAM, DRAM, FPGA BRAM, flash memory, programmable read only memory, etc.) of the quantum controller 210 as well as for reading contents of the registers/memory of the quantum controller 210 and conveying the contents to the quantum programming subsystem 202. The I/O manager 368 may, for example, include a PCIe controller, AXI controller / interconnect, and/or the like. In an example implementation, the I/O manager 368 comprises one or more registers 380 which can be written to and read from via a quantum machine API (an example of which is shown below in Table 6) and via reserved variables in the language used to create pulse program description 206.

[0066] FIG. 4 shows an example implementation of the pulser of FIG. 3B. The example pulser 302i shown comprises instruction memory 402, pulse template memory 404, digital pattern memory 406, control circuitry 408, and compute and/or signal processing circuitry (CSP) 410.

[0067] The memories 402, 404, 406 may comprise one or more be any type of suitable storage elements (e.g., DRAM, SRAM, Flash, etc.). The instructions stored in memory 402 are instructions to be executed out by the pulser 302i for carrying out its role in a quantum algorithm. Because different pulsers 302 ₀ -302 _L-1 have different roles to play in any particular quantum algorithm (e.g., generating different pulses at different times), the instructions memory 402 for each pulser may be specific to that pulser. For example, the pulse program description 206 from the quantum programming subsystem 202 may comprise a first set of instructions to be loaded (via I/O manager 368) into pulser 302 ₀ , a second set of instructions to be loaded into pulser 302i, and so on. Each pulse template stored in memory 404 comprises a sequence of one or more samples of any arbitrary shape (e.g., Gaussian, sine, impulse, etc.) representing the pulses to be sent to pulse operation circuitry 358. Each digital pattern stored in memory 406 comprises a sequence of one or more binary values which may represent the digital pulses to be sent to the digital manager 354 for generating digital control signals DigCtrl ₀ — DigCtrl _J-1 .

[0068] The control circuitry 408 is operable to execute the instructions stored in memory 402 to process inbound signal Ah, generate raw outbound pulses CP'i, and generate digital control signals In the example implementation shown, the processing of the inbound signal Ah is performed by the CSP circuitry 410 and based (at least in part) on the signal

[0069] The compute and/or signal processing circuitry (CSP) 410 is operable to perform computational and/or signal processing functions, which may comprise, for example Boolean-algebra based logic and arithmetic functions and demodulation (e.g., of inbound signals ). The CSP 410 may comprise memory in which are stored instructions for performing the functions and demodulation. The instructions may be specific to a quantum algorithm to be performed and be generated during compilation of a quantum machine specification and QUA program.

[0070] In operation of an example implementation, generation of a raw outbound pulse comprises the control circuitry 408: (1) determining a pulse template to retrieve from memory 404 (e.g., based on a result of computations and/or signal processing performed by the CSP 410); (2) retrieving the pulse template; (3) performing some preliminary processing on the pulse template; (4) determining the values of and _ to be sent to the pulse operation manager 356 (as predetermined in the pulse program description 206 and/or determined dynamically based on results of computations and/or signal processing performed by the CSP 410); (5) determining the value of to be sent to the pulse operation circuitry 358; (6) determining the value of in_slcti to be sent to the input manager 352; (7) determining a digital pattern to retrieve from memory 406 (as predetermined in the pulse program description 206 and/or determined dynamically based on results of computations and/or signal processing performed by the CSP 410); (8) outputting the digital pattern as Di to the digital manager along with control signal (as predetermined in the pulse program description and/or determined dynamically based on results of computations and/or signal processing performed by the CSP 410); (9) outputting the raw outbound pulse CP'i to the pulse operations circuitry 358; (10) outputting resultsi to the I/O manager.

[0071] FIG. 5 shows an example implementation of the pulse operations manager and pulse operations circuitry of FIG. 3B. The pulse operations circuitry 358 comprises a plurality of pulse modification circuits 508 ₀ -508 _R-1 (R is an integer ³ 1 in general, and R= L/2 in the example shown). The pulse operations manager 356 comprises control circuitry 502, routing circuitry 506, and a plurality of modification settings circuits 504 ₀ -504 _K-1 .

[0072] Although the example implementation has a 1-to-2 correspondence between pulse modification circuits 508 ₀ -508 _R-1 and pulser circuits 302 ₀ -302 _L-1 , such does not need to be the case. In other implementations there may be fewer pulse modification circuits 508 than pulser circuits 302. Similarly, other implementations may comprise more pulse modification circuits 508 than pulser circuits 302.

[0073] As an example, in some instances, two of the pulsers 302 ₀ -302 _L-1 may generate two raw outbound pulses which are a phase-quadrature pulse pair. For example, assuming CP ₁ and CP ₁ are a phase- quadrature pulse pair to be output on path 313 ₃ . In this example, pulse operations circuitry 358 may process CP ₁ and CP ₂ by multiplying a vector representation of CP' ₁ and CP' ₂ by one or more 2 by 2 matrices to: (1) perform single-sideband-modulation, as given by where w is the frequency of the single side band modulation and TS is the time passed since the reference time (e.g. the beginning of a certain control protocol); (2) keep track of frame-of-reference rotations, as given by where F is the total phase that the frame of reference accumulated since the reference time; and/or (3) perform an IQ-mixer correction where C ₀₀ ,

C ₀₁ , C ₁₀ , and C ₁₁ are the elements of a matrix that corrects for IQ-mixer imperfections. In an example implementation, each modification settings circuit, 504 _k , contains registers that contain the matrix elements of three matrices: an IQ-mixer correction matrix; S _k =

, a single side band frequency modulation matrix; and a frame rotation matrix, which rotates the IQ axes around the axis perpendicular to the IQ plane (i.e. the z-axis if I and Q are the x-axis and y-axis). In an example implementation, each modification settings circuit 504 _k also contains registers that contain the elements of the matrix products C _k S _k F _k and S _k F _k .

[0074] In the example shown, each pulse modification circuit 508 _r is operable to process two raw outbound pulses CP' _2r and CP' _2r+1 acording to: the modification settings ops_cnfg _2r and ops_cnfg _2r+1 ; the signals ops_ctrl _2r and ops_ctrl _2r+1 ; and the signals pai^ and pair _2r+1 - In an example implementation pair _2r and pair _2r+1 may be communicated as ops_ctrl _2r and ops_ctrl _2r+1 - The result of the processing is outbound pulses CP _2r and CP _2r+1 - Such processing may comprise adjusting a phase, frequency, and/or amplitude of the raw outbound pulses CP' _2r and CP' _2r+1 . In an example implementation, ops_cnfg _2r and ops_cnfg _2r+1 are in the form of a matrix comprising real and/or complex numbers and the processing comprises matrix multiplication involving a matrix representation of the raw outbound pulses CP _2r and CP _2r+1 and the ops_cnfg2r and ops_cnfg2r _+i matrix.

[0075] The control circuitry 502 is operable to exchange information with the pulser circuits

302 ₀ -302 _L-1 to generate values of ops_confg ₀ -ops_confg _L-1 and f_demod ₀ -f_demod _L-1, to control routing circuitry 506 based on signals ops_slct ₀ -ops_slct _L-1 and dmod_slct ₀ -dmod_slct _L-1 , and to update pulse modification settings 504 ₀ -504 _K-1 based on IF ₀ -IF _L-1 and F ₀ -F _L-1 such that pulse modification settings output to pulse operations circuitry 358 are specifically tailored to each raw outbound pulse (e.g., to which quantum element 222 the pulse is destined, to which signal path 313 the pulse is destined, etc.) to be processed by pulse operations circuitry 358.

[0076] Each modification settings circuit 504 _k comprises circuitry operable to store modification settings for later retrieval and communication to the pulse operations circuitry 358. The modification settings stored in each modification settings circuit 504 _k may be in the form of one or more two- dimensional complex-valued matrices. Each signal path 313 ₀ -313 _K-1 may have particular characteristics (e.g., non-idealities of interconnect, mixers, switches, attenuators, amplifiers, and/or circuits along the paths) to be accounted for by the pulse modification operations. Similarly, each quantum element 122 ₀ - 122 _k may have a particular characteristics (e.g. resonance frequency, frame of reference, etc.). In an example implementation, the number of pulse modification settings, K, stored in the circuits 504 corresponds to the number of quantum element 122 ₀ -122 _K-1 and of signal paths 313 ₀ -313 _K-1 such that each of the modification settings circuits 504 ₀ -504 _K-1 stores modification settings for a respective one of the quantum elements 122 ₀ -122 _K-1 and/or paths 313 ₀ -313 _K-1 . In other implementations, there may be more or fewer pulse modification circuits 504 than signal paths 313 and more or fewer pulse modification circuits 504 than quantum elements 122and more or fewer signal paths 313 than quantum elements 122. The control circuitry 502 may load values into the modification settings circuit 504 ₀ -504 _K-1 via signal 503.

[0077] The routing circuitry 506 is operable to route modification settings from the modification settings circuits 504 ₀ -504 _L-1 to the pulse operations circuit 358 (as ops_confg ₀ -ops_confg _L-1 ) and to the pulsers 302 ₀ -302 _L-1 (as f_dmod ₀ -f_dmod _L-1 ). In the example implementation shown, which of the modification settings circuits 504 ₀ -504 _K-1 has its/their contents sent to which of the pulse modification circuits 508 ₀ -508 _R-1 and to which of the pulsers 302 ₀ -302 _L-1 is controlled by the signal 505 from the control circuitry 502.

[0078] The signal ops_slcti informs the pulse operations manager 356 as to which modification settings 504 _k to send to the pulse modification circuit The pulser may determine ops_slcti based on the particular quantum element 122 _k and/or signal path 313 _k to which the pulse is to be transmitted (e.g., the resonant frequency of the quantum element, frame of reference, and/or mixer correction). The determination of which quantum element and/or signal path to which a particular pulser is to send an outbound pulse at a particular time may be predetermined in the pulse program description 206 or may be determined based on calculations performed by the pulser 302i and/or others of the pulsers 302 ₀ - 302 _L-1 during runtime. The control circuitry 502 may then use this information to configure the routing block 506 such that the correct modification settings are routed to the correct one or more of the pulse modification circuits 508 ₀ -508 _L-1 .

[0079] In an example implementation, the digital signal IFi instructs the pulse operations manager 356 to update a frequency setting of the modification settings circuit 504 _k indicated by In an example implementation, the frequency setting is the matrix S _k (described above) and the signal IFi carries new values indicating the new to be used in the elements of the matrix S _k . The new values may, for example, be determined during a calibration routine (e.g., performed as an initial portion of the quantum algorithm) in which one or more of the pulsers 302 ₀ -302 _L-1 sends a series of outbound pulses CP, each at a different carrier frequency, and then measures the corresponding inbound signals Al.

[0080] In an example implementation, the signal Fi instructs the pulse operations manager 356 to update a frame setting of the modification settings circuit 504 _k indicated by ops_slcti. In an example implementation, the frame setting is the matrix F _k (described above) and the signal Fi carries a rotation matrix Fi which multiplies with F _k to rotate F _k . This can be written as F _k = F _l F _k = frame of reference before the rotation and Df is the amount by which to rotate the frame of reference.

The pulser 302i may determine Df based on a predetermined algorithm or based on calculations performed by the pulsers 302i and/or others of the pulsers 302 ₀ -302 _L-1 during runtime.

[0081] In an example implementation, the signal dmod_sclti informs the pulse operations manager 356 from which of the modification settings circuits 504 _k to retrieve values to be sent to pulser 302i as . The pulser may determine based on the particular quantum element 122 _k and/or signal path 315 _k from which the pulse to be processed arrived. The determination of from which quantum element and/or signal path a particular pulser 302i is to process an inbound pulse at a particular time may be predetermined in the pulse program description 206 or may be determined based on calculations performed by the pulser 302i and/or others of the pulsers 302 ₀ -302 _L-1 during runtime. The control circuitry 502 may then use this information to configure the routing block 506 such that the correct modification settings are routed to the correct one of the pulsers 302 ₀ -302 _L-1 . For example, when pulse generation circuit needs to demodulate a pulse signal from quantum element 122 _k , it will send a dmod_sclti signal instructing the pulse operation manager 356 to rout the element SF _k00 = cos(w _k * time_stamp + F _k ) from modification settings circuit 504 _k to pulser (as [0082] In the example implementation shown, the digital signals C ₀ -C _K-1 provide information about signal-path-specific modification settings to be used for each of the signal paths 313 ₀ -313 _K-1 . For example, each signal C _k may comprise a matrix to be multiplied by a matrix representation of a raw outbound pulse such that the resulting output outbound pulse is pre-compensated for errors (e.g., resulting from imperfections in mixers, amplifiers, wiring, etc.) introduced as the outbound pulse propagates along signal path 313 _k . The result of the pre-compensation is that output outbound pulse CPi will have the proper characteristics upon arriving at the quantum processor 218. The signals C ₀ -C _K-1 may, for example, be calculated by the quantum controller 210 itself, by the programming subsystem 202, and/or by external calibration equipment and provided via I/O manager 368. The calculation of signals may be done as part of a calibration routine which may be performed before a quantum algorithm and/or may be determined/adapted in real-time as part of a quantum algorithm (e.g., to compensate for temperature changes during the quantum algorithm).

[0083] FIG. 6A shows frequency generation circuitry of the quantum controller of FIG. 3B. In the example implementation shown, the frequency generation circuity is part of control circuitry 502 of pulse operations manager circuitry 356. The frequency generation circuitry comprises K coordinate rotation digital computer (CORDIC) circuits 602 ₀ -602 _K-1 , phase generation circuitry 604, timestamp register 606, and S-Matrix generation circuitry 608.

[0084] Each CORDIC circuit 602 _k is operable to compute cosine and sine of its input, q _k , thus generating two signals cos(q _k ) and sin( q _k ).

[0085] The phase generation circuitry 604 is operable to generate the CORDIC input parameters q ₀ -q _k _ ₁ based on: (1) the frequency setting signals IF ₀ -IF _L-1 from the pulsers 302 ₀ -302 _L-1 ; and (2) the contents, TS, of the timestamp register 606.

[0086] The timestamp register 606 comprises circuitry (e.g., a counter incremented on each cycle of the clock signal clk1) operable to track the number of cycles of clk1 since a reference point in time (e.g., power up of the quantum controller 210, start of execution of set of instructions of a quantum algorithm by the quantum controller 210, etc.).

[0087] In the example shown, the phase generation circuitry 604 sets q ₀ = 2pf ₀ (TS)(dt _clk1 ), where f ₀ is a frequency determined from the signal IFo, TS is the number of clock cycles counted from the reference point and dt _clk1 is the duration of a single clock cycle of clk1. This leads to the CORDIC outputs being a pair of phase-quadrature reference signals, cos 2pf ₀ (TS)(dt _clk1 ) ) and sin 2pf ₀ (TS)(dt _clk1 ) ), as in the example shown, which are used to generate the So rotation matrix that rotates at a frequency f ₀ . [0088] As shown in FIG. 6B, the signal IFi may comprise an update component and an fi component. In an example implementation, when updatei is asserted then the phase generation circuitry updates one of more of f ₀ - f _k-1 to be the value of

[0089] The S-matrix generation circuitry 608 is operable to build the matrices S ₀ -S _K-1 from the outputs of the CORDIC circuits 602 ₀ -602 _K-1 . In an example implementation, the S-matrix generation circuit 608 is operable to synchronize changes to the S matrices such that any matrix update occurs on a desired cycle of clock clk1 (which may be determined by the control information IF ₀ -IF _L-1 ).

[0090] With K CORDIC circuits 602 _k , the frequency generation circuitry is operable to concurrently generate K S-matrices. In instances that more than K frequencies are needed over the course of a set of instructions, the phase generation circuit 604 is operable to change the input parameter q _k of one or more of the CORDIC circuits 602 ₀ -602 _K-1 to stop generating one frequency and start generating the K+1 ^th frequency. In some instances, it may be necessary for the new frequency to start at a phase q that would have been the phase if the new frequency was being generated from the initial reference time (e.g., because the new frequency would be used to address a quantum element that has a resonance at the new frequency and that was coherent since the reference point). In some other instances, it might be necessary to start the new frequency from the phase that the old frequency ended in. The phase generation circuit 604 and timestamp register 606 enable both of these possibilities.

[0091] FIG. 7 shows an example implementation of the digital manager of FIG. 3B. Shown in FIG. 7 are the digital manager 376, controlled circuits 710 ₀ -710 _J-1 , and input manager 372.

[0092] The example implementation of the digital manager 376 comprises input routing circuit 702, configuration circuit 704, output routing circuit 706, processing paths 708 ₀ -708 _Z-1 (where Z is an integer), and routing control circuit 712.

[0093] The configuration circuit 704 is operable to store configuration settings and use those settings to configure the processing paths 708 ₀ -708 _Z-1 and/or the routing control circuit 712. The settings may, for example, be loaded via the signal DM_config as part of the pulse program description 206 provided by quantum programming subsystem 202. The settings may comprise, for example, one or more of: a bitmap on which may be based a determination of which of signals D ₀ -D _L-1 to route to which of signals P' ₀ -P' _Z-1 for one or more instructions of a pulse program; a bitmap on which may be based a determination of which processing path outputs P ₀ -P _Z-1 to route to which of DigOut ₀ -DigOut _J+M-1 for one or more instructions of a pulse program; and one or more bit patterns which processing paths 708 ₀ -708 _Z-1 may convolve with one or more of the signals P' ₀ -P' _Z-1 for one or more instructions of a pulse program. [0094] The input routing circuit 702 is operable to route each of the digital signals D ₀ -D _L-1 to one or more of the processing paths 708 ₀ -708 _Z-1 . At any given time (e.g., for any particular instruction of every pulser 302i of pulsers 302 ₀ -302 _L ), the input routing circuit 702 may determine to which of the processing paths 708 ₀ -708 _Z-1 to rout the signal of signals D ₀ -D _L-1 based on the signal of signals fanin ₀ -fanin _L - ₁ . That is, for a particular instruction, the digital signal may be routed to any one or more of paths 708 ₀ - 708 _Z-1 based on the value of fanini for that instruction. For example, fanini may be a Z-bit signal and a state of each bit of fanini during a particular instruction may indicate whether is to be routed to a corresponding one of the Z processing paths 708 ₀ - 708 _Z-1 during that instruction. An example implementation of the input routing circuit 702 is described below with reference to FIG. 8.

[0095] The output routing circuit 706 is operable to route each of the digital signals P ₀ -P _Z-1 to one or more of DigOut ₀ -DigOut _J+M-1 (In the example shown DigOut ₀ -DigOut _J+M-1 connect to stream ₀ -stream _M-1 , respectively, and DigOut _M -DigOut _J+M-1 connect to DigCtrlO— DigCtrlJ-1, respectively). At any given time (e.g., for any particular instruction of every pulser of pulsers 302 ₀ -302 _L ), the output routing circuit 706 may determine to which of DigOut ₀ -DigOut _J+M-1 to rout the signal of the signals P ₀ -P _L-1 based on the signal of signals fanout ₀ -fanout _Z-1 . That is, for a particular instruction, the digital signal P _z (z an integer between 0 and Z) may be routed to any one or more of DigOut ₀ -DigOut _J+M-1 based on the value of fanout _z for that instruction. For example, values of fanout _z may be (J+M-1) bits and a state of each bit of fanout _z during a particular instruction may indicate whether P _z is to be routed to a corresponding one of the J+M-1 signals DigOut during that instruction. An example implementation of the output routing circuit 706 is described below with reference to FIG. 8.

[0096] Each of the processing path circuits 708 ₀ -708 _Z-1 is operable to manipulate a respective one of signals P' ₀ -P' _Z-1 to generate a corresponding manipulated signal P ₀ -P _Z-1 . The manipulation may comprise, for example, introducing a delay to the signal such that the resulting one or more of DigOut ₀ -DigOut _J+M-1 reach(es) its/their destination (a controlled circuit 710 and/or input manager 372) at the proper time with respect to the time of arrival of a corresponding quantum control pulse at the corresponding destination.

[0097] Each of the controlled circuits 710 ₀ -710 _J-1 and input manager 372 is a circuit which, at least some of the time, needs to operate synchronously with quantum control pulses generated by one or more of pulsers 302 ₀ -302 _L-1 (possibly a reflection/return pulse from a quantum processor in the case of input manager 372). Accordingly, each of the control circuits 710 ₀ -710 _J-1 receives a respective one of control signals DigOut ₀ -DigCtrl _J-1 that is synchronized with a respective quantum control pulse. Similarly, input manager 372 receives a plurality of the DigOut signals (one for each stream input). [0098] The routing controller 712 comprises circuitry operable to generate signals fanin ₀ -fanin _L-1 and fanout ₀ -fanout _Z-1 based on D_path ₀ -D_path _L-1 , D_port ₀ -D_port _L-1 , and/or information stored in configuration circuit 704.

[0099] FIG. 8 shows an example implementation of the digital manager of FIG. 3B. The example input routing circuit 502 comprises routing circuits 802 ₀ -802 _L-1 and combining circuits 804 ₀ -804 _L-1 . The example output routing circuitry 506 comprises circuits routing circuits 808 ₀ -808 _Z-1 and combining circuits 810 ₀ - 810 _J-1 .The example processing path circuits are convolution circuits 806 ₀ -806 _Z-1 .

[00100] Each of the routing circuits 802 ₀ -802 _L is operable to route a respective one of signals D ₀ -D _L-1 to one or more of the combining circuits 804 ₀ -804 _Z-1 . To which of combining circuit(s) 804 ₀ -804 _Z-1 the signal Di is routed is determined based on the signal fanini. In an example implementation, each signal fanini is a Z-bits signal and, for a pulsen instruction, the value of bit z of the signal fanini determines whether the signal Di is to be routed to combining circuit 804 _z for that instruction. The value of fanini may be updated on a per-instruction basis.

[00101] Each of combining circuits 804 ₀ -804 _L-1 is operable to combine up to L of the signals DO-DL-1 to generate a corresponding one of signals P ₀ -P _Z-1 - In an example implementation, the combining comprises OR-ing together the values of the up to L signals.

[00102] Each of the routing circuits 808 ₀ -808 _Z-1 is operable to route a respective one of signals P' ₀ -P'z- ₁ to one or more of the combining circuits 810 ₀ -810 _J-1 . TO which of combining circuit(s) 810 ₀ -810 _J-1 the signal P' _z is routed is determined based on the signal fanout _z . In an example implementation, each signal fanout _z is a (J+M-1)-bit signal and the value of bit j+m-1 of the signal fanout _z determines whether the signal P' _z is to be routed to combining circuit 804 _J+M-1 . In an example implementation the value of fanout _z is preconfigured before the runtime of the pulse program, however, in another implementation it may be updated dynamically (e.g., on a per-instruction basis).

[00103] Each combining circuit of combining circuits 810 ₀ -810 _J-1 is operable to combine up to Z of the signals P' ₀ -P' _Z-1 (received via inputs 803o to 803 _Z-1 ) to generate a corresponding one of signals DigOuto- DigOut _J+M-1 . In an example implementation, the combining comprises OR-ing together the values of the up to Z signals.

[00104] Each convolution circuit 806 _z is operable to convolve signal P _z with pattern _z to generate signal P' _z . In an example implementation, pattern _z is preconfigured before runtime of the pulse program, however, in another implementation it may be updated dynamically. pattern _z may be determined based on: the destination(s) of signal P _z (e.g., to which of controlled circuits 510 and/or input of input manager 352 Pz is intended); characteristics of the corresponding quantum control pulse (e.g., any one or more of its frequency, phase, amplitude, and/or duration); and/or process, temperature, and/or voltage variations.

[00105] FIG. 9A illustrates configuration and control of the quantum controller via the quantum programming subsystem. In FIG. 9A, the quantum controller 210 comprises one or more instances of various circuits (such as the pulser, input manager, ouput manager, digital manager, pulse operations manager, and analog front end circuits described above). Connected to the inputs and outputs of the quantum controller 210 may be a plurality of external devices (e.g., oscilloscopes, waveform generators, spectrum analyzers, mixers, amplifiers, etc.) and a plurality of quantum elements. As described in further detail below, these physical circuits can be allocated and deallocated independently of one another such that the physical resources of the quantum controller 210, and the quantum elements and external devices connected to the quantum controller 210 via the analog and digital inputs and outputs, can be organized into one or more "quantum machines."

[00106] Also shown in FIG. 9Aare a compiler 906 and quantum machines manager 908 of the quantum programming subsystem 202.

[00107] The compiler 906 comprises circuitry operable to generate a machine code pulse program description 206 based on: (1) a specification 902; (2) a pulse generation program 904; and (3) a resources management data structure from the quantum machines manager 908.

[00108] Referring to FIG. 9B, an example implementation of the compiler 906 comprises analyzer circuitry 952 and synthesizer circuitry 954. The analyzer circuitry 952 is operable to parse the specification 902 and program 904 to generate an intermediate code representation (e.g., a parse tree). The synthesizer circuitry 954 is operable to generate machine code based on the intermediate code representation and the available resources indicated by the quantum machines manager 908.

[00109] The specification 902 identifies resources of a quantum machine some of which are mapped to physical circuits during an instantiation of a quantum machines (e.g. input and output ports of the quantum controller 210), and some of which the compiler attaches to physical circuits of the quantum controller 210 during compilation of a Pulse generation Program 904.The compiler 906 may allocate resources for executing the program 904 based on the specification 902, the program 904, and/or the available resources indicated by the quantum machines manager 908. As an example, assume a scenario in which there are five quantum elements in the specification 902 and the program 904 uses only two of the quantum elements; the number of the pulsers 302 ₀ -302 _L allocated may depend on the available resources and the specifics of the program 904. In one case the compiler 906 may allocate a first number (e.g., two) of the pulsers 302 ₀ -302 _L for interfacing with the two quantum elements and in another case the compiler may allocate a second number (e.g., four) for sending pulses to the two quantum elements. Examples of resource definitions which may be present in specification 902 are described below with reference to FIGS. 10A-C. In an example implementation, Python is used as a "host" language for the specification and the specification is a Python dictionary. In this example implementation the Python syntax/constructs can thus be leveraged to create the specification (Python variables, functions, etc.).

[00110] The pulse generation program 904 comprises statements that define a sequence of operations to be performed by the quantum machine defined in the specification 902. Such operations typically include the generation of one or more analog pulses to be sent to a controlled element, such as a quantum element. Such operations typically include measuring one or more return pulses from an element. The pulse generation program is also referred to herein as a QUA program. Functions, syntax, etc. of the QUA programming language are described below. In an example implementation, Python is used as a "host" language for the QUA program. This allows leveraging Python syntax/constructs (Python variables, functions, etc.) to generate the QUA program, but it is still a QUA - not Python - program to be compiled by the compiler 906 to generate QOP machine code, and to be executed on the quantum controller/s 210.

[00111] In an example implementation, a QUA program defines the sequence of statements for: (1) Generating, shaping and sending pulses to the quantum device; (2) Measuring of pulses returning from the quantum device; (3) Performing real-time classical calculations on the measured data and storing results in classical variables; (4) Performing real-time classical calculations on classical variables; (5) Controlling the flow of the program, including branching statements; and (6) Streaming of data from the quantum controller 210 to the quantum programing system 202 and processing and saving it in the quantum programing system 202.

[00112] In addition to the specification of which pulses are played, a QUA program can also specify when they should be played through both explicit and implicit statements and dependency constructs. Thus, a QUA program can define exactly the timing in which pulses are played, down to the single sample level and single clock cycles of the quantum controller 210.

[00113] In an example implementation, the pulses syntax defines an implicit pulse dependency, which determines the order of pulse execution. The dependency can be summarized as follows: (1) Each pulse is played immediately, unless dependent on a previous pulse yet to be played; (2) Pulses applied to the same quantum element are dependent on each other according to the order in which they are written in the program In another implementation, timing and ordering or pulses may be set forth explicitly in the QUA program.

[00114] Example QUA programming constructs are described below in Table 1.

Table 1: QUA programming constructs

[00115] The Play statement in QUA instructs the quantum controller 210 to send the indicated pulse to the indicated element. The quantum controller 210 will modify or manipulate the pulse according to the element's properties defined in the quantum machine specification (i.e., the compiler will generate the required pulse modification settings which will then be stored to the appropriate one or more of pulse modification settings circuit(s) 504 ₀ -504 _K-1 ), so the user is relieved of the burden of having to specify the modifications/manipulations in each individual Play statement.

[00116] If the element has a single input, the pulse sent to it may be defined with a single waveform.

For example:

[00117] Denoting the samples of the waveform as s,, the play statement instructs the quantum controller 210 to modulate the waveform samples with the intermediate frequency of the element: w _IF , is the intermediate frequency defined in the quantum machine specification of the element and F _F is the frame phase, initially set to zero (see z_rot statement specifications for information on F _F ). The quantum controller 210 then plays s, to the analog output port defined in the definition of the element (in the above example, port 1).

[00118] If the element has two mixed inputs (i.e. two output ports of the quantum controller 210 are connected to the element via an IQ mixer), in addition to the intermediate frequency, a mixer and a lo_frequency may be defined in the quantum machine specification. For example: [00119] A pulse that is sent to such element may be defined with two waveforms. For example:

[00120] In addition, a mixer can be defined with a mixer correction matrix that corresponds to the intermediate_frequency and the lo_frequency. For example:

[00121] Denoting the samples of the waveforms by , and Q _i , the play statement instructs the quantum controller 210 to modulate the waveform samples with the intermediate frequency of the element and to apply the mixer correction matrix in the following way: ' ^s intermediate and the C _ij 's are the matrix elements of the correction matrix defined in the mixer for the relevant intermediate_frequency and lo_frequency. As mentioned above, F _F is the frame phase, initially set to zero (see z_rot statement specifications for information on F _F) . The quantum controller 210 then plays and Q _i , to the analog output ports defined in the definition of the element (in the above example, port 1 and port 2, respectively).

[00122] An element could have digital inputs as well as analog inputs. Each digital input of an element may be defined with three properties: port, delay, and buffer. For example:

[00123] For a simple example, a pulse that is played to such quantum element could include a single digital marker which points to a single digital waveform. For example:

[00124] The coding of the digital waveform may be a list of the form: [(value, length), (value, length), ..., (value, length)], where each value is either 0 or 1 indicating the digital value to be played (digital high or low). Each length may be an integer (e.g., divisible by 4 in one example implementation) indicating for how many nanoseconds the value should be played. A length 0 indicates that the corresponding value is to be played for the remaining duration of the pulse. In the example above, the digital waveform is a digital high.

[00125] When such pulse is played to the element, via the play or the measurement command, the digital waveform may be sent to all the digital inputs of the element. For each digital input, however, the quantum controller 210 may: (1) Delay the digital waveform by the delay that is defined in the definition of the digital input (e.g., given in ns); (2) Convolve the digital waveform with a digital pattern that is high for a duration which is, for example, twice the buffer that is defined in the definition of the digital input (e.g., given in ns in a "buffer"); and (3) Play the digital waveform to the digital output of the quantum controller 210 that is indicated in the quantum machine specification to be connected to the digital input. In other implementations, the digital pattern with which the digital waveform to be convolved may be more complex than a simple high value. In one such example, the "buffer" object may comprise "duration" and "pattern" properties.

[00126] In the example above a play(pulsel, qubit) command would play: (1) A digital waveform to digital output 1, which starts 144 ns after the analog waveforms and which is high for 56 ns (the length of the pulse plus 2x8 ns); and (2) A digital waveform to digital output 2, which starts 88 ns after the analog waveforms and which is high for 80 ns (the length of the pulse plus 2x20 ns).

[00127] A measurement can be done for an element that has outputs defined in the quantum machine specification. For example:

[00128] As seen in the above example, when a quantum element has outputs, two additional properties may be defined: time_of_f light and smearing.

The pulse used in a measurement statement may also be defined as a measurement pulse and may have integration_weights defined. For example: [00129] A measurement statement, such as the one shown above, instructs the quantum controller 210 to: (1) Send the indicated pulse to the indicated element, manipulating the waveforms in the same manner that is described in the play statement section above; (2) After a time period time_of_flight (e.g., given in ns), samples the returning pulse at the quantum controller 210 input port/s that is/are connected to the output/s of the element. It saves the sampled data under stream_name (unless stream_name = None, in which case the sampled data will not be saved). The sampling time window will be of a duration that is the duration of the pulse plus twice the smearing (e.g., given in ns). This accounts for the returning pulse that is longer than the sent pulse due to the response of the quantum device, as well as for the cables and other elements in the pulse's path; and (3) Process the sampled data according to the parameters specified in the measure statement.

[00130] An example of processing the sampled data according to a measure statement is demodulation of the sampled data with a frequency intermediate_frequency, defined in the definition of the element, weighted integration of the demodulated data with integration parameters ("integration_weights") that are defined in the quantum machine specification and are specified in the measure statement, and storing of the result in the indicated variable. The quantum controller 210 can perform multiple (e.g., 10 or more) demodulations and integrations at any given point in time, which may or may not be a part of the same measurement statement. The precise mathematical operation on the sampled data is: variable where s, is the sampled data, w _IF is the intermediate_frequency, F _F is the frame phase discussed in the z_rot statement below, and and are the cosine and sine integration_weights. In an example implementation, the integration_weights are defined in a time resolution of 4 ns, while the sampling is done with time resolution of 1 ns (lGSa/Sec sampling rate):

[00131] In the above example, the integration parameters consist of a vector of integration weights (which may be a vector with single integration weight to be used as a constant integration weight) and the received samples of the measurement pulse are integrated to generate a scalar result. In another implementation, the integration parameters may comprise an integration weights vector and other parameters to be used for specifying how to perform a series of integrations to generate a vector of integration results rather than a scalar. For simplicity, the following examples use integrations that results in two-element vectors, but other implementations may generate vectors with three or more elements.

[00132] For example, the integration parameters may specify a first set of integration weights to be used for a first plurality of samples of the received measurement pulse (e.g., a first 100ns of the pulse), and a second set of integration weights to be used for a second plurality of samples of the received measurement pulse (e.g., a second 100ns of the pulse). The parameters may also indicate whether the integration of each portion should start from zero (referred to here as "chunked integration") or accumulated with the result from the previous portion (referred to here as "accumulated" integration).

[00133] Another option is the integration parameters may indicate the integration is to generate a moving average. The integration parameters may specify a length an offset of integration windows on which chunked integration is to be performed using those windows. For example, the parameters may specify 100ns windows offset by 40ns and then chunked integration may be performed on samples of the measurement pulse from 0 to 100ns, from 40ns to 140ns, from 80ns to 180ns, and so on for the duration of the pulse.

[00134] Another example of processing the sampled data according to a measure statement is processing of the data by a neural network with parameters defined in the quantum machine specification and/or specified in the measure statement and storing of the result in the indicated variable which can be a scalar or a vector.

[00135] Another example of processing the sampled data according to a measure statement is when the element's output is a digital output and thus the sampled data is digital. One example processing of this data can be counting of the number of digital pulses that arrive to the relevant controller's input in a given time window. Another example may be the time tagging of the arrival of pulses that arrive in a given time window relative to the beginning of the window.

[00136] Compilation may include allocating specific resources of the quantum controller 210 to that quantum machine and then generating machine code that, when executed by quantum controller 210, will use those allocated resources.

[00137] The quantum machines manager 908 comprises circuitry operable to determine resources present in the quantum controller 210 and the availability of those resources at any given time. To determine the resources, the quantum machines manager 908 may be operable to read one or more configuration registers of the quantum controller 210, inspect a netlist of one or more circuits of the quantum controller 210, and/or parse hardware description language (HDL) source code used to define circuits of the quantum controller 210 and/or other files used to describe various configurations of the hardware and software components. Once the resources are determined, the quantum machines manager 908 may keep track of which resources are in use and which are available based on which quantum machines are "open" (i.e., in a state where some resources are reserved for that machine regardless of which, if any, pulse program that quantum machine is executing at that time), and/or which pulse programs are loaded into and/or being executed by the quantum controller 210 at that time. For example, referring briefly to FIG. 13A, during a time period where two quantum machines are open, each executing one of a first two pulse programs ("Program 1" and "Program 2"), the system may be configured as shown in FIG. 13A and a data structure managed by the quantum machines manager 908 may reflect the situation as shown in Table 2.

Table 2: Example data structure maintained by quantum machines manager

During another time period where a single quantum machine is open and executing a third pulse program

("Program 3"), the system may be configured as shown in FIG. 13B. The data structure managed by the quantum machines manager 908 may reflect the situation as shown in Table 3.

Table 3: Example data structure maintained by quantum machines manager

[00138] Table 4 below shows an example schema which uses Python as a host language the quantum machine specification is one or more Python dictionaries.

Table 4: Example quantum machine specification schema

[00139] Elements of the quantum processor, (e.g. qubits, resonators, flux lines, gates, etc.), external devices (e.g., oscilloscopes, spectrum analyzers, waveform generators, etc.), and/or any other element which is a part of a quantum machine and is connected to output and/or input ports of the controller 210, are defined using one or more of the other properties described in Table 4 and/or other similar properties which may be used in other implementations.

[00140] An example of other properties which may be used to specify an element are properties of a neural network that processes pulses sent to the element. For example, an element specification may specify that pulses sent to it are to be generates and/or processed by a neural network and the element definition may include one or more parameters specifying the number of layers of the neural network, the number of neurons of the neural network, the weights and biases for each neuron of the neural network, and/or other parameters familiar to those working with neural networks. The neural network having the specified parameters may then be trained during a calibration routine (e.g., at the beginning of execution of a QUA program).

[00141] For each element defined in a specification 902, the controller output and/or input ports to which it is connected are defined. During compilation, pulse modification settings for manipulating pulses intended for an element may be generated (for loading into pulse modification settings circuits 504) and the pulse modification setting circuit(s) 504 to which they will be loaded before execution may be chosen and may be allocated to the quantum machine on which the program is to be executed. Similarly, parameters and configurations of operations that will be performed on input signals related to an element (e.g. readout/measurement pulses) may be generated during compilation (for loading into compute and signal processing circuits 410). Likewise, the compute and signal processing circuit 410 in which they will be used may be chosen during compilation and may be allocated to the quantum machine on which the program is to be executed during compilation.

[00142] One example of an element that a quantum machine may contain is an IQ mixer that is connected to two output ports of the controller 210. To correct for mixer imbalances, the in phase/quadrature (IQ) waveforms of the pulse can be multiplied by a 2X2 mixer correction matrix before being sent to the output ports. This mixer correction matrix, determined via a calibration routine, may be frequency dependent. Thus, a mixer definition may include the mixer's name and a list of one or more frequencies and the correction matrix to be used at each frequency. In one example implementation, the correction matrix is loaded into corresponding pulse modification circuit during compilation. Similarly, an element definition may include an intermediate frequency with which every pulse sent to the element is to be modulated.

[00143] An example quantum machine specification file is described below with reference to FIGS. 10A-10C. While the example implementations we show here (including the one Table 4 refers to) show some possible properties that can be defined and specified in the quantum machine specification, it is not limited to these examples. For example, various filters and their parameters may be defined (e.g. FIR filter) to be performed on pulses to be played to certain elements and/or on input signals to the controller.

[00144] Pulses available for transmission by a quantum machine may be defined using one or more of the properties described in Table 4 and/or other similar properties which may be used in other implementations. Each pulse has a length. Each pulse is made of one or more waveforms. In one implementation there are two types of pulses: control pulses that are pulses that are only sent to the quantum system and will not be measured, and measurement pulses that are sent to the quantum system and will be measured upon return. The definition of a measurement pulse may specify parameters to be used for processing the measurement pulse upon its return from the element to which it was sent. Such parameters may include, for example, integration weights, integration method (e.g., normal, chunked, accumulated, moving average, etc.), parameters (e.g., number of layers, number of neurons, weights and biases, and/or the like) of a neural network, parameters (e.g., number of taps and tap coefficients) of a FIR filter, and/or the like. During compilation, pulse definitions may be used to, for example: generate pulse templates to load into pulse template memory 404; generate instructions to be loaded into instruction memory 402 and/or compute and signal processing circuit 410 for retrieving and manipulating the contents of pulse template memory 404 to achieve the defined pulses; and/or generate one or more classical processor programs to be executed by compute and signal processing circuit 410 for processing readout/measurement pulses.

[00145] FIGS. 10A-10C show an example quantum machine specification. The example shown uses Python as a host language. The example quantum machine specification is a Python dictionary with a key of "config" and a value that comprises a plurality of nested objects, some of which are key-value pairs and some of which are nested dictionaries.

[00146] The "version" key-value pair which indicates the version of the quantum machine specification schema being used.

[00147] The "controllers" object is used to specify the number of modules/units that make up the quantum controller 210 of the quantum machine. The example shown specifies just a single quantum control module named "con1", which is of type "opx1" (different opx types may, for example, indicated different hardware and/or configuration of the hardware). For each controller 210, the output and input ports that are used in the quantum machine are specified. For analog outputs and inputs, DC offset voltage is specified as well.

[00148] The "elements" object is used to specify elements that are connected to output and input ports of the controller 210. Such elements may include quantum elements (e.g., qubits, readout resonators, flux lines, etc.), external devices (e.g., test equipment such as oscilloscopes, spectrum analyzers, signal generators, etc.), and/or any other element connected to the output and/or input ports of the controller. The example shown in FIG. 10A specifies a qubit named "qubit" and a readout resonator named "RR". The "qubit" element comprises "mixinputs", "operations", and "frequency" objects. The "mixinputs" object comprises "I", "Q", "lo_frequency", and "mixer" objects. The "I" and "Q" objects specify the corresponding output ports of "coni" to which the inputs of the element are connected. The "intermediate_frequency" object specifies the intermediate frequency with which pulses sent to the qubit are to be modulated (e.g., determined from a qubit calibration routine). The "mixer" object refers to mixer object "mixer_quibit," which is defined later in the quantum machine specification. The "operations" object specifies a "gauss-pulse" which refers to the "gauss_pulse_in" object is defined later in the quantum machine specification. The "RR" element comprises "mixinputs", "operations", "outputs", "frequency", "time_of_flight", and "smearing" objects. The "mixinputs" object comprises "I", "Q", "lo_frequency", and "mixer" objects. The "I" and "Q" objects specify the corresponding ports of "coni". The "frequency" object specifies the frequency of the readout_resonator (e.g., determined from a qubit calibration routine). The "mixer" object refers to mixer object "mixer_res," which is defined later in the quantum machine specification. The "operations" object specifies a "meas_pulse" which refers to the "meas_pulse_in" object is defined later in the quantum machine specification. The "time_of_flight" and "smearing" objects specify those values for the readout resonator. The "outputs" object specifies an output on the element "outl" and the corresponding input port of "coni" to which it is connected.

[00149] The "Pulses" object is used to specify pulses available for transmission by the quantum machine. The example shown specifies two pulses: "means_pulse_in" and "gauss_pulse_in." The "means_pulse_in" object in turn comprises "operation", "length", "waveforms", "integration_weights", and "digital_marker" objects. The "operation" object specifies it as a "measurement" pulse. The "I" and "Q" objects of the "waveforms" object refer to the "exc_wf" and "zero_wf" objects which are defined later in the quantum machine specification. The "integration_weights" object refers to the integration weights objects "integWl" and "integW2" which are defined later in the specification. The "digital_marker" object refers to the "markerl" object defined later in the specification.

[00150] The "gauss_pulse_in" object comprises "operation", "length", and "waveforms" objects. The "operation" object specifies it is a "control" pulse. The "I" and "Q" objects of the "waveforms" object refer to the "gauss_wf" and "zero_wf" objects which are defined later in the quantum machine specification.

[00151] The "waveforms" object defines the "zero_wf", "gauss_wf", and "exc_wf" objects ("exc_wf" not shown) using "type" and "samples" objects.

[00152] The "digital_waveforms" defines the "markerl" object using a "samples" object.

[00153] The "integration_weights" object defines the objects "integWl" and "integW2" using "cosine" and "sine" objects. [00154] The "mixers" object defines the "mixer_res" and "mixer_qubit" objects using "freq", "lo_freq", and "correction" objects.

[00155] FIG. 11 is a flow chart showing an example process for operation of the quantum orchestration platform. The process begins in block 1102 in which one or more quantum control modules are connected together to form quantum controller 210 and the quantum controller 210 is connected to a quantum system. In this regard, the quantum controller 210 is modular and extendable enabling use of as many units as desired/necessary for the quantum algorithm to be performed. Each of the modules may, for example, comprise one or more of each of the circuits shown in FIG. 3B.

[00156] In block 1103, a quantum machine with a certain specification is instantiated by a user. This may be done via a Quantum Machines Manager API. In an example of such an API, shown in Table 5, this may include a call to the open_qm() function or the open_qm_from_file() function.

Table 5: Quantum Machines Manager API

[00157] In block 1104, the quantum machines manager 908 attempts to allocate machine resources (i.e., resources allocated to a particular quantum machine regardless of whether a pulse program is currently executing on that quantum machine) of the quantum controller 210 to the new quantum machine according to the specification.

[00158] In block 1105, the quantum machines manager 908 determines whether the allocation and instantiation is successful. If not, then in block 1122 an alert is generated for the user (e.g., to inform the user that there are currently insufficient resources available to instantiate the required quantum machine). If allocation is successful, then in block 1106 the allocated resources are stored in quantum machines manager 908, which updates its data structure of available resources to reflect the allocation of resources to the quantum machine, the new quantum machine is instantiated, and the process advances to block 1107. [00159] In block 1107, a user requests to execute a QUA program on the quantum machine. This may be done via a Quantum Machine API. In an example of such an API, shown in Table 6, this may include a call to the execute() function. Prior to the request to execute the QUA program, and/or during the execution of the QUA program, the user can use a Quantum Machine API, such as the one shown below in table 6, to alter any parameter that was set in the specification 902. This is advantageous where, for example, something (e.g., temperature, voltage, equipment in use, and/or any other factor that may impact a quantum experiment), has changed since the time the specification 902 was generated.

Table 6: Quantum Machine API

[00160] In block 1108, compiler 906 receives the quantum machine specification and the QUA program (e.g., in the form of two plain text files).

[00161] In block 1109, compiler 906 attempts to compile the program using the quantum machine specification and the resources of the quantum controller 210 that the quantum machines manager 908 indicates are available for program execution. During compilation, the compiler determines and allocates the program resources of the quantum controller 210 that will be used in the program.

[00162] In block 1110, the compiler 906 determines whether compilation is successful. If not, then in block 1122 an alert is generated for the user (e.g., to inform the user that there are currently insufficient resources available to execute the program). If compilation is successful, then the process advances to block 1112. If compilation is successful the compiler outputs the machine code to be loaded to the quantum controller for program execution.

[00163] In block 1112, the programming system 202 loads machine code generated by the compiler 906 based on the program, the quantum machine specification, and the available resources into quantum controller 210 (e.g., via I/O Manager 368).

[00164] In block 1114, the programming subsystem 202 determines whether the machine code has been successfully loaded into the quantum controller 210. If not, then in block 1122 an alert is generated for the user. If the machine code is successfully loaded, then the process advances to block 1116.

[00165] In block 1116, the program is executed on the quantum controller and the quantum machines manager 908 updates its data structure of available resources to reflect the allocation of resources to the program. [00166] Either while the program is executing and/or after the program execution is over, the user may change the configuration/specification of the quantum machine. This may be done via a Quantum Machine API, an example implementation of which is shown in Table 6. An example of changing the configuration/specification of the quantum machine may be that the user uses the call to the set_frequency(qe, freq) function, which changes the frequency of the specified element to the specified frequency. Another example is using the quantum machine API to set the value of an 10 register in the I/O Manager 368. For example, the following shows waiting for a QUA program to reach a pause instruction, then 101 is set to a new value via the quantum machine API, and then the QUA program resumes.

[00167] In another example implementation such quantum machines API may include commands for changing any parameter defined in the specification (e.g. an API command may allow to change the definition of the samples of a specified waveform, change the parameters of a neural network associated with an element or a pulse, etc.) If the specification is changed while a program is running on the quantum machine, this may include writing to registers and/or memory of the quantum controller 210 while the program is executing as well as changing the specification in the quantum machines manager. If the specification is changed while no program is running of the quantum machine, this may include only changing the specification in the quantum machines manager. The ability to alter characteristics of the quantum machine without closing the quantum machine and even during execution of a QUA program on the quantum machine enables, for example, altering the quantum machine based on calculations performed on the quantum programming subsystem 202. As an example, during execution of a QUA program, results may be streamed from the quantum controller 210 to the quantum programming subsystem 202, the quantum programming subsystem 202 may perform some calculations using the results (e.g., resource-intensive calculations not possible or desirable to perform on the quantum controller 210) and then update the quantum machine based on the calculations. The update may impact the currently running QUA program or a successive run of the same QUA program or a different QUA program without having to close the quantum machine for reconfiguration (which may be desirable to, for example, avoid having to repeat a calibration).

[00168] In block 1118, upon completing execution of the instructions, the program ends and the quantum machines manager 908 updates its data structure to deallocate the program resources that were allocated to that program and updates the available resources.

[00169] In block 1120, the process can advance either back to block 1107 again in which a user a user requests to execute a QUA program on the quantum machine, or to block 1124 in which a user closes the quantum machine. If the user closes the quantum machine the process advances to block 1126.

[00170] In block 1126 the quantum machines manager 908 deallocate the machine resources that were allocated to that quantum machine and updates the available resources.

[00171] In an example implementation, the pulse generation program 904 is written using the QUA programming language.

[00172] To aid understanding of the QOP's unique approach to quantum control, a use case example of Power Rabi Calibration will now be described, end-to-end. The use case begins by discussing the theoretical background of the experiment and its goals and showing a typical setup on which it is implemented. It is then shown, step by step, how to program the QOP to perform this experiment, how to execute it, and how to retrieve the results.

[00173] The purpose of Power Rabi Calibration is to measure Rabi oscillations - oscillations of the qubit state that are driven by a control signal. Assume that the qubit is initially in the ground state (state 0), a drive pulse is applied to rotate the qubit on the Bloch sphere around a rotation axis in the x-y plane. The qubit is then measured by calculating the effect of the resonator (that is coupled to the qubit) on a measurement pulse. The rotation angle, and consequently the probability to find the qubit in the excited state (1), depends on the amplitude of the drive pulse. The protocol is repeated with varying amplitudes (a). For each amplitude, the protocol is repeated many times for averaging, which allows extracting the probability of the qubit to be in the excited state after the drive pulse is applied. This probability is then plotted as a function of the drive amplitude, from which the rotation angle, as a function of the amplitude, can be extracted. This experiment provides an important tool for calibrating quantum gates. For example, the amplitude at which the qubit reaches a rotation of 180 degrees gives us the required amplitude for performing an X-gate (the quantum NOT gate). Similarly, this program can be run to identify the amplitude required to perform a p/2-rotation. [00174] The example experiment setup is shown in FIG. 12A. The quantum device is a superconducting circuit composed of a single, fixed frequency qubit and a readout resonator, with the following Hamiltonian:

[00175] Since the interaction between the qubit and resonator is dispersive an approximation can be made that leads to the following form of the Hamiltonian:

Where D = w _Q - w _R . Finally, the qubit driving term can be explicitly included, which leads to the

Hamiltonian:

[00176] Here it is assumed that the frequencies of both the qubit and the resonator were calibrated in advance.

[00177] A signal, at the resonance frequency of the qubit, of the form s(t) = Acos ( w _Q t + F) rotates the Bloch vector of the qubit at a rate A around the axis which is on the x-y plane and is rotated by an angle f from the x-axis.

[00178] If the parameters A(t) and f(t) are varied slowly compared to w _Q , then this still holds at each point in time. Thus, if a pulse is sent (i.e. a signal that is finite in time) to the qubit of the form s(t) = A(t)cos ( w _Q t + F) where A(t) varies slowly compared to w _Q , the Bloch vector will be rotated around the above axis by a total angle which is given by the integral of A(t): Here t ₀ is the time at which the pulse starts and t is the duration of the pulse.

[00179] In a typical Power Rabi Oscillations experiment, the shape and duration of the pulse A(t) are fixed (e.g. a 20-nanosecond gaussian pulse) and only its amplitude is varied in order to get different rotation angles q. The experiment performed by repeating the following basic sequence:

(1) Initialize the qubit to the ground state, 0.

(2) Apply a pulse with amplitude a (e.g. A(t) is a Gaussian shaped pulse with peak amplitude a, which rotates the qubit by q so that the qubit is in the state

(3) Apply a resonant pulse to the readout resonator, and from the phase of the reflected pulse, deduce the state of the qubit.

[00180] This basic sequence is repeated in the program for a series of amplitudes (i.e., many values of a), where for each amplitude, a, it is repeated N times (i.e. N identical basic sequences with the same a). N identical measurements are required because of state collapse. The measurement at the end of each basic sequence gives a binary result (0 or 1) for the state of the qubit, even if before the measurement the qubit was in a superposition state. However, when the results of the N identical basic sequences are averaged, the average will be ~sin ² ( q). Denote this average as since it reflects the probability of measuring the qubit in the 11) state for a given amplitude, a. The results of the whole experiment can be summarized by plotting as a function of a (see FIG. 12B).

[00181] This can be used to calibrate any single qubit rotation gate that rotates the qubit by an angle

Q, around a rotation axis that is on the x-y plane and is rotated f from the x-axis. Such a gate is denoted by R _{F (q)} · In fact one of the typical goals of the Power Rabi Oscillations experiment is to calibrate the amplitude of a given pulse so that it performs p-rotation (X-gate) or p/2-rotation. f, however, cannot be determined from the Rabi oscillations and must be determined by other means (e.g. tomography).

[00182] An example implementation of the Power Rabi experiment in the QOP will now be described.

[00183] The experiment is implemented on the QOP as follows: (1) Defining a quantum machine specification; (2) Opening an interface to the quantum machine; (3) Writing the program; (4) Running the program; (5) Saving the results [00184] As discussed above, the quantum machine specification is a description of the physical elements present in the experimental setup and their properties, as well as the connectivity between the elements and the quantum control module(s). The physical elements that are connected to the quantum control module(s) are denoted in the quantum machine specification as elements, which are discrete entities such as qubits, readout resonators, flux lines, gate electrodes, etc. Each of these has inputs and in some cases outputs, connected to the quantum control module(s). The properties of the elements and their connectivity to the quantum control module(s) are used by the QOP to interpret and execute QUA programs correctly (e.g. a pulse played to a certain qubit is modulated by the quantum control module with the intermediate frequency defined for this element). The quantum machine specification in FIGS. 10A-10C is used for this particular example.

[00185] The pulses applied to the elements are also specified in the quantum machine specification, where each pulse is defined as a collection of temporal waveforms. For example, a pulse to an element with two analog inputs and one digital input will specify the two waveforms applied to the analog inputs of the element and the digital pulse applied to its digital input.

[00186] Also defined in the quantum machine specification are the properties of any auxiliary components that affect the actual output of the controller, such as IQ mixers and local oscillators.

[00187] After defining the quantum machine specification, an interface to a new quantum machine can be opened with the following command: my_qm = qmManager.open_qm(my_config)

[00188] After having defined the quantum machine specification, write the QUA program. Below is the power Rabi program. with program() as powerRabiProg :

[00189] The program is very intuitive to someone who knows the theory of the Power Rabi calibration, which illustrates one of the benefits of the QOP: the ability for people (e.g., quantum physicists) to rapidly design and run quantum experiments without first having to become expert programmers or computer systems designers. This is in stark contrast to current systems which, for example, require quantum physicists to learn a hardware description language such as VHDL or Verilog to be able to run their quantum experiments/algorithms.

[00190] This program: (1) Defines the variables a (amplitude) and Nrep (number of repetitions), as well as the variables / and Q, which store the demodulation result; and (2) Performs 100 repetitions (the loop over Nrep), where in each scan loops over 100 values of a, from 0 - 1 in increments of 0.01 and for each value of a performs the Rabi sequence: playing a pulse with amplitude a to the qubit, then measuring the resonator response and extracting from it the state of the qubit. This is done by sending a measurement pulse to the resonator and demodulating and integrating the returning pulse using the indicated integration weights.

[00191] The raw data sampled at the quantum control module's input is also streamed and saved with the label 'samples.' Finally, the demodulation and integration results, / and Q, are saved as well as the corresponding amplitude.

[00192] This Python code block creates an object named powerRabiProg, which is a QUA program that can be executed on an open quantum machine.

[00193] The program is run on a quantum machine "my_qm" defined in the quantum machine specification using the following command which saves the results in the job object "myjob." myjob = my_qm.execute(powerRabiProg)

[00194] After the program is executed, the results can be pulled: my_powerRabi_results = job.get_results()

[00195] This command pulls the results from "myjob" to the results object "my_powerRabi_results".

[00196] The data in "my_powerRabi_results" is a Python object which contains the variables saved during the program, as well as all the raw data sampled at the input of the quantum control module. Here, "my_powerRabi_results" will have: (1) my_powerRabi_results.variable_results, which will be a dictionary containing three keys: '', 'Q' and 'a'. The value for each key will be a dictionary containing the saved data and the time stamp for each saved data point; (2) my_powerRabi_results.raw_results, which will be a dictionary containing a single key and its value will be a dictionary containing the sampled input data and the timestamp of each data point.

[00197] In accordance with an example implementation of this disclosure, a system comprises a pulse program compiler circuit (e.g., 906) comprising circuitry operable to analyze a pulse program (e.g., 904) that comprises a pulse operation statement that (e.g., a play or measure statement of table 1) that specifies a first pulse to be generated, and specifies a target of the first pulse (e.g., a qubit, antenna, and/or any other device or circuit to or at which pulses are transmitted). The compiler is operable to generate, based on the pulse program, machine code that, if loaded into a pulse generation and measurement circuit (e.g., 260), configures the pulse generation and measurement circuit to generate the first pulse and send the first pulse to the target. The pulse program may comprises a first declaration statement that defines a first variable, and the pulse operation statement may reference the first variable. The first variable may be part of an expression that determines one or more characteristics (e.g., phase, frequency, amplitude, duration, time of generation, and/or the like) of the first pulse. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to determine (e.g., in a CSP 410) a value to be assigned to the first variable during runtime of the machine code. The pulse operation statement may specify parameters to be used for processing of a return signal resulting from transmission of the first pulse (e.g., a return from a readout resonator that was the target of the first pulse or a reflection of the first pulse off of a physical object), and loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to perform the processing of the return signal. The processing of the return signal may comprise integration of the return signal, and the parameters may specify integration weights to use for the integration. The integration weights may be specified as one or more vectors. The parameters may comprise parameters of a neural network to be used for the processing of the return signal. The processing of the return signal may comprises integration of the return signal, and the parameters may specify time parameters to use for the integration (e.g., duration of a window over which to perform the integration, a length of an offset of window, and/or the like). The processing of the return signal may comprise demodulation of the return signal. The parameters may specify the frequency of a local oscillator to use for the demodulation. The return signal may comprise a series of pulses and the processing of the return signal may comprise counting the number of pulses in a given time window. The return signal may comprises a series of pulses and the processing of the return signal may comprise identifying the arrival time of each pulse relative to the beginning of a specified time window. The pulse operation statement may specify that a result of processing of a return signal resulting from transmission of the first pulse is to be associated with the first variable and stored to memory (e.g., in 260 and/or 252), and loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to associate the result with the first variable and store the result to memory. The pulse operation statement may specify an expression to be used for processing of the first pulse by the pulse generation and measurement circuit (e.g., in a pulser 302 and/or pulse operations circuit 358) before the pulse generation and measurement circuit sends the first pulse to the target. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to perform the processing of the first pulse before sending the first pulse to the target. The pulse program may comprise a first declaration statement that defines a first variable. The pulse operation statement may references the first variable. The expression may reference the first variable. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to determine the value of the first variable during runtime of the machine code. The pulse operation statement may specify a condition expression that is to be evaluated during runtime by the pulse generation and measurement circuit, and that must evaluate to a determined value before the first pulse is sent to the target. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to evaluate the condition expression during runtime of the machine code, and send the first pulse to the target only when the condition expression evaluates to the determined value. The pulse program comprises a phase alteration statement that specifies the target and an expression for the angle by which to alter a phase of a local oscillator of the pulse generation and measurement circuit that is associated with the target. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to evaluate the expression during runtime of the machine code, and alter the phase of the local oscillator generation circuit based on a result of the evaluation of the expression. The pulse program may comprises a update frequency statement that specifies the target and an expression for the frequency to which to set a local oscillator of the pulse generation and measurement circuit that is associated with the target. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to: evaluate the expression during runtime of the machine code; and set the frequency of the local oscillator generation circuit based on a result of the evaluation of the expression. The pulse program may comprises a flow control statement (e.g., a wait or wait_for_trigger statement.). Loading the machine code comprising the flow control statement into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to wait for a signal before resuming execution of the pulse program. The pulse program comprises a conditional statement (e.g., if statement, loop statement, etc.) that specifies a condition expression and one or more conditioned statements. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to: evaluate the condition expression; and execute instructions corresponding to the one or more condition statements only if the condition expression evaluates to a determined value (e.g., true or false). The compiler may be operable to parse a machine specification (e.g., 902) that comprises a definition of the first pulse and a definition of the target; and generate the machine code based on the parsed machine specification. The pulse operation statement may specifies a break condition. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to: evaluate the break condition expression; and stop generation of the first pulse when the break condition evaluates to a determined value. The pulse program may comprise an align statement that specifies a plurality of pulse targets. Loading the machine code into the pulse generation and measurement circuit may configure the pulse generation and measurement circuit to wait for execution of instructions involving any of the plurality of pulse targets to complete before beginning execution of subsequent instructions involving any of the plurality of pulse targets. The pulse program may comprises a wait statement that specifies a target and an amount of time to wait before sending a pulse to the target. Loading the machine code into the pulse generation and measurement circuit may configures the pulse generation and measurement circuit to wait the specified amount of time. The pulse program may comprise a variable assignment statement that assigns an expression to a variable (e.g., 101) that is associated with a register that can be read from and/or written to by a programming subsystem during runtime of the machine code, and the pulse operation statement may references the variable (e.g., as a parameter and/or in an expression). The pulse program may comprise a variable declaration statement that assigns a first variable to a second variable, where the second variable (e.g., 101) is a reserved variable reference to a register that can be read from and/or written to by a programming subsystem during runtime of the machine code, and the pulse operation statement may references the second variable.

[00198] The present method and/or system may be realized in hardware, software, or a combination of hardware and software. The present methods and/or systems may be realized in a centralized fashion in at least one computing system, or in a distributed fashion where different elements are spread across several interconnected computing systems. Any kind of computing system or other apparatus adapted for carrying out the methods described herein is suited. A typical implementation may comprise one or more application specific integrated circuit (ASIC), one or more field programmable gate array (FPGA), and/or one or more processor (e.g., x86, x64, ARM, PIC, and/or any other suitable processor architecture) and associated supporting circuitry (e.g., storage, DRAM, FLASH, bus interface circuits, etc.). Each discrete ASIC, FPGA, Processor, or other circuit may be referred to as "chip," and multiple such circuits may be referred to as a "chipset." Another implementation may comprise a non-transitory machine-readable (e.g., computer readable) medium (e.g., FLASH drive, optical disk, magnetic storage disk, or the like) having stored thereon one or more lines of code that, when executed by a machine, cause the machine to perform processes as described in this disclosure. Another implementation may comprise a non- transitory machine-readable (e.g., computer readable) medium (e.g., FLASH drive, optical disk, magnetic storage disk, or the like) having stored thereon one or more lines of code that, when executed by a machine, cause the machine to be configured (e.g., to load software and/or firmware into its circuits) to operate as a system described in this disclosure.

[00199] As used herein the terms "circuits" and "circuitry" refer to physical electronic components

(i.e. hardware) and any software and/or firmware ("code") which may configure the hardware, be executed by the hardware, and or otherwise be associated with the hardware. As used herein, for example, a particular processor and memory may comprise a first "circuit" when executing a first one or more lines of code and may comprise a second "circuit" when executing a second one or more lines of code. As used herein, "and/or" means any one or more of the items in the list joined by "and/or". As an example, "x and/or y" means any element of the three-element set{(x), (y), (x, y)}. As another example, "x, y, and/or z" means any element of the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}. As used herein, the term "exemplary" means serving as a non-limiting example, instance, or illustration. As used herein, the terms "e.g.," and "for example" set off lists of one or more non-limiting examples, instances, or illustrations. As used herein, circuitry is "operable" to perform a function whenever the circuitry comprises the necessary hardware and code (if any is necessary) to perform the function, regardless of whether performance of the function is disabled or not enabled (e.g., by a user-configurable setting, factory trim, etc.). As used herein, the term "based on" means "based at least in part on." For example, "x based on y" means that "x" is based at least in part on "y" (and may also be based on z, for example).

[00200] While the present method and/or system has been described with reference to certain implementations, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present method and/or system. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present disclosure without departing from its scope. Therefore, it is intended that the present method and/or system not be limited to the particular implementations disclosed, but that the present method and/or system will include all implementations falling within the scope of the appended claims.