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Patent Searching and Data


Title:
SOLID-STATE IMAGING DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/167060
Kind Code:
A1
Abstract:
This solid-state imaging device 100 is provided with: an N-type semiconductor layer 101; an element layer 102 which comprises a photoelectric conversion element and an active element; a wiring layer 103 which performs wiring to the active element; and an element isolation trench 135 which penetrates through the semiconductor layer 101. The element layer 102 comprises a P-type region 112 and an N-type region 113. A first hole accumulation layer 103a is formed on a surface of the semiconductor layer 101, said surface being on the reverse side from the element layer 102. A second hole accumulation layer 130b is formed on portions of the semiconductor layer 101 and the element layer 102, said portions being in contact with the element isolation trench 135. The P-type region 112 of the element layer 102 and the first hole accumulation layer 103a are connected to each other by means of the second hole accumulation layer 130b.

Inventors:
ODA MASAHIRO (JP)
TAKAHASHI HIROKI (JP)
DOI HIROYUKI (JP)
OTSUKI HIROHISA (JP)
Application Number:
PCT/JP2021/006326
Publication Date:
August 26, 2021
Filing Date:
February 19, 2021
Export Citation:
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Assignee:
TOWER PARTNERS SEMICONDUCTOR CO LTD (JP)
TOWER SEMICONDUCTOR LTD (IL)
International Classes:
H01L21/76; H01L27/146; H04N5/369
Domestic Patent References:
WO2014021115A12014-02-06
WO2012117931A12012-09-07
Foreign References:
JP2009124087A2009-06-04
JPH09186307A1997-07-15
JP2017224741A2017-12-21
Attorney, Agent or Firm:
MAEDA & PARTNERS (JP)
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