STORAGE DEVICE, METHOD FOR OPERATING STORAGE DEVICE, INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING SYSTEM AND ELECTRONIC DEVICE

WIPO Patent Application WO/2021/090092

A1

The present invention provides a storage device which has a small signal transmission delay and a low power consumption, wherein an NAND-type flash memory and a controller as well as a controller and a cash memory are respectively connected with each other by means of short wiring lines. For example, an Si transistor is formed with use of a single crystal substrate, and an NAND-type flash memory is configured using the Si transistor. Since an OS transistor is able to be formed by means of a thin film method or the like, if a cash memory is configured using an OS transistor, the cash memory is able to be provided above an NAND-type flash memory by being superposed on the NAND-type flash memory. By forming an NAND-type flash memory and a cash memory in a same chip, the NAND-type flash memory and a controller as well as a controller and the cash memory are respectively connected with each other by means of short wiring lines.

YAMAZAKI SHUNPEI (JP)
IKEDA TAKAYUKI (JP)
KUNITAKE HITOSHI (JP)

PCT/IB2020/059740

May 14, 2021

October 16, 2020

Click for automatic bibliography generation  

SEMICONDUCTOR ENERGY LAB (JP)

H01L25/065; G11C5/02; G11C11/00; G11C11/405; H01L21/336; H01L21/8234; H01L21/8242; H01L25/07; H01L25/18; H01L27/06; H01L27/088; H01L27/10; H01L27/108; H01L27/11526; H01L27/11556; H01L27/1156; H01L27/11573; H01L27/11582; H01L29/786; H01L29/788; H01L29/792

JP2011146075A	2011-07-28
JP2014197444A	2014-10-16
JP2013025806A	2013-02-04
JP2011249362A	2011-12-08

View/Download PDF      PDF Help

Previous Patent: CONTINUOUS STORAGE OF DATA IN SYSTEM WITH LIMITED STORAGE CAPACITY

Next Patent: SPRAY BOOM HEIGHT CONTROL SYSTEM