CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application is based on, claims priority to, and incorporates herein by reference in their entirety United States Provisional Patent Application No. 63/141,633, filed on January 26, 2021, and entitled “Methods and Apparatus for Restoration of Brain Network Activity” and United States Provisional Patent Application No. 63/141,628, filed on January 26, 2021, and entitled “Systems and Methods for Energy -Efficient Measurement of N europhy si ol ogi cal O scill ati ons . ”

GOVERNMENT RIGHTS

[0002] Not applicable.

BACKGROUND

[0003] Measurement of neuronal oscillations, particularly measuring the phase of neural signals and the synchronization between neural oscillations, is important for the diagnosis and treatment of various neurological and neuropsychiatric disorders. Conventional neurostimulation devices cannot provide phase extraction or phase-based synchrony calculations. Calculation of the arctangent function to determine phase can include computationally expensive hardware operations such as multiplication and iterative vector processing. Calculating synchrony measures such as phase locking value (“PLV”) and phase-amplitude coupling (“PAC”) is similarly intensive due to the use of trigonometric and other non-linear functions. Accordingly, improved systems and methods for efficient phase measurement are desired.

SUMMARY

[0004] In accordance with some embodiments of the disclosed subject matter, systems and methods for measuring and controlling synchrony between two or more regions (e.g., cross- regional synchrony) or within a single region (e.g. cross-frequency synchrony) of a subject’s brain are provided. [0005] In accordance with some embodiments of the disclosed subject matter, a system for measuring phase of an oscillating signal is provided, the system comprising: a signal conditioning circuit, configured to: receive an electrically-oscillating signal; bandpass filter the oscillating signal; and convert the bandpass filtered oscillating signal to real (Re) and imaginary (Im) components; and a phase extraction circuit coupled with the signal conditioning circuit, configured to: receive the real and imaginary components of the oscillating signal; determine, based on the real and imaginary components, the quadrant of the oscillating signal on the complex plane; and determine, based on the determined quadrant, the phase of the oscillating signal using a linear arctangent approximation algorithm.

[0006] In some embodiments, the linear arctangent approximation algorithm determines the phase normalized by J it and comprises the calculation: 0 + — for the quadrant from - - to + -, 4Re ¹ 4 4’ wherein 0 is the offset and — is the fraction; - — — for the quadrant from + - to + — , wherein

4Re ’ 2 41m 4 4 ’

- 2 is the onset and - 41m is the traction; , sig an(Im) J ■ 1 -I - _4RE tor the q iuadrant from -I — 4 to - 4 ,’ wherein sig un( kIm) ■ 1 is the offset and — is the fraction; and — - — the quadrant from — - 4Re ’ 2 41m 4 to — — , wherein — - is the offset and — — is the fraction.

4 2 4Im

[0007] In some embodiments, the phase extraction circuit comprises: a reciprocal lookup table configured to provide the reciprocal of the larger of the real component and imaginary component; a multiplication module configured to multiply the output of the reciprocal lookup table with the smaller of the real component and imaginary component to provide the faction; an offset value module configured to provide the offset based on the determined quadrant; a fraction sign module configured to provide the fraction sign based on the determined quadrant; and an addition module coupled with the output of the multiplication module, offset value module, and fraction sign module, and configured to add the provided offset and provided fraction, wherein the sign of the provided fraction is determined by the provided fraction sign.

[0008] In some embodiments, the phase extraction circuit further comprises a linearization lookup table coupled between the output of the reciprocal lookup table and the addition module, wherein the linearization lookup table is configured to linearize the fraction by compensating for nonlinear phase errors in the fraction. [0009] In some embodiments, phase extraction circuit is further configured to: reduce, prior to the reciprocal lookup table, the range of the real and imaginary components such that largest of the two is in the range 0.5 to 1.0; and divide, prior to the addition module, the output of the multiplication module by 4.

[0010] In some embodiments, the signal conditioning circuit is further configured to provide the real and imaginary components in a binary format; and reducing the range of the real and imaginary components comprises: determining the absolute value of the real component and imaginary component; and removing the same number of leading zeros from the absolute value real and imaginary components.

[0011] In some embodiments, the signal conditioning circuit further comprises: a low-noise amplifier configured to amplify the electrically-oscillating signal; and an analog-to-digital converter coupled with the low-noise-amplifier and configured to convert the amplified oscillating signal to a digital format.

[0012] In some embodiments, the signal conditioning circuit implements a Hilbert Transform to convert the bandpass filtered oscillating signal to real and imaginary components.

[0013] In some embodiments, the system further comprises a feature determination circuit, wherein: the electrically oscillating signal comprises a local field potential (LFP) received from a region of a brain; and the feature determination circuit comprises: the phase extraction circuit; and a magnitude extraction circuit configured to determine a magnitude of the oscillating signal, wherein: the feature determination circuit is configured to determine, based on the determined phase and determined magnitude, at least one selected from the group of phase-amplitude coupling (PAC) and phase locking value (PLV).

[0014] In some embodiments, the magnitude extraction circuit is configured to: receive the real and imaginary components from the signal conditioning circuit; and determine the magnitude of the oscillating signal according to a “-norm approximation.

[0015] In accordance with some embodiments of the disclosed subject matter, a system for measuring synchrony in one or more regions of a subject’s brain is provided, the system comprising: a signal conditioning circuit configured to: receive a neural signal from a neural signal source in the brain; and determine the real and imaginary components of the received neural signal; a feature determination circuit coupled with the signal conditioning circuit and configured to: receive the real and imaginary components of the neural signal; determine, using a linear arctangent approximation algorithm, the phase of the neural signal; determine the magnitude of the neural signal; and determine, based on the determined phase and magnitude, synchrony metrics; and a synchrony circuit coupled with the feature determination circuit and configured to: compare the synchrony metrics with a threshold.

[0016] In some embodiments, the synchrony metrics comprises at least one selected from the group of phase-amplitude coupling (PAC) and phase locking value (PLV).

[0017] In some embodiments, the synchrony metrics comprises at least one selected from the group of instantaneous phase and instantaneous amplitude.

[0018] In some embodiments, the threshold comprises at least one selected from the group of a predefined threshold and a randomly generated threshold.

[0019] In some embodiments, the feature determination circuit is further configured to determine, based on the real and imaginary components, the quadrant of the neural signal on the complex plane; and the linear arctangent approximation algorithm determines the phase normalized by

^J it and comprises the calculation: 0 + — for the quadrant from — - to + -, wherein 4Re ¹ 4 4’

> . . ,,,, . Im . . „ . 1 Re „ . . ,, 7T 3TT , . 1 . ,

0 is the offset and — is the fraction; - for the quadrant from + - to -I - , wherein - is the offset and — is the fraction; sign(Im) ■ 1 + — for the quadrant from + — to — — , wherein 4Im 4Re 4 4 sig an( kIm) J ■ 1 is the offset and — is the fraction; and — - — — for the quadrant from — - to — — , 4Re ’ 2 4/m 4 4 ’

1 Re wherein — is the offset and - is the fraction.

2 4/m

[0020] In some embodiments, the feature determination circuit further comprises: a reciprocal lookup table configured to provide the reciprocal of the larger of the real component and imaginary component; a multiplication module configured to multiply the output of the reciprocal lookup table with the smaller of the real component and imaginary component to provide the fraction; an offset value module configured to provide the offset based on the determined quadrant; a fraction sign module configured to provide the fraction sign based on the determined quadrant; and an addition module coupled with the output of the multiplication module, offset value module, and fraction sign module, and configured to add the provided offset and provided fraction, wherein the sign of the provided fraction is determined by the provided fraction sign.

[0021] In some embodiments, the signal conditioning circuit further comprises: a low-noise amplifier configured to amplify the neural signal; an analog-to-digital converter coupled with the low-noise-amplifier and configured to convert the amplified neural signal to a digital format; a bandpass filter configured to filter the amplified neural signal to the frequency range of at least one selected from the group of Delta, Theta, Alpha, Beta, Low Gamma, Gamma, High Gamma, Ripple, and Fast Ripple brain waves; and a transform circuit configured to transform the filtered neural signal to real and imaginary components.

[0022] In some embodiments, the system may further comprise a stimulation circuit coupled with the synchrony circuit and configured to provide a stimulation output based on the result of the comparison of the synchrony metrics with the threshold.

[0023] In some embodiments, the threshold comprises a pseudo-random value and the stimulation output is configured to cause synchrony disruption.

[0024] In some embodiments, the feature extraction circuit further comprises a linearization lookup table coupled between the output of the reciprocal lookup table and the addition module, wherein the linearization lookup table is configured to linearize the fraction by compensating for nonlinear phase errors in the fraction; and the system: is contained within an implantable medical device; and calculates phase with an error of less than one least significant bit.

[0025] The foregoing and other advantages of the present disclosure will appear from the following description.

BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Various objects, features, and advantages of the disclosed subject matter can be more fully appreciated with reference to the following detailed description of the disclosed subject matter when considered in connection with the following drawings, in which like reference numerals identify like elements.

[0027] Fig. 1 is a block diagram of an exemplary stimulation system in accordance with an embodiment.

[0028] Fig. 2 illustrates a method for restoring brain activity in accordance with a first embodiment.

[0029] Fig. 3 illustrates a method for restoring brain activity in accordance with a second embodiment.

[0030] Fig. 4 illustrates a method of detecting a phase of oscillation of a neurological signal from a region of a subject’s brain. [0031] Fig. 5 illustrates phase-timed stimulation to stimulate a brain region at a particular phase of a neurological signal.

[0032] Fig. 6A illustrates the PSD of 16-channel input-referred local field potential (“LFP”).

[0033] Fig. 6B illustrates LFP measurements in the application of the systems and methods described herein.

[0034] Fig. 6C illustrates the extraction of phase from a signal and the time-locked stimulation of a brain to that extracted phase in accordance with the systems and methods described herein.

[0035] Fig. 6D illustrates the extraction of phase, calculation of PLV, and stimulation based on the phase and PLV in accordance with the systems and methods described herein.

[0036] FIG. 7A depicts a schematic of a signal processing chain for phase extraction from an oscillating signal according to one aspect of the present disclosure.

[0037] FIG. 7B is a table of mathematical expression of the approximated phases in four quadrants of the imaginary plane.

[0038] FIG. 7C depicts a schematic of a phase extraction module according to one aspect of the present disclosure.

[0039] FIG. 7D depicts linear arctangent approximation calculation results according to one aspect of the present disclosure.

[0040] FIG. 7E depicts the corrected and linearized linear arctangent approximation calculation results of FIG. 7D.

[0041] FIG. 7F depicts phase errors of linear arctangent approximation calculations.

[0042] FIG. 7G depicts phase extraction utilizing a linear arctangent approximation algorithm according to one aspect of the present disclosure.

[0043] FIG. 7H depicts a chip layout of an integrated circuit according to one aspect of the present disclosure.

[0044] FIG. 8A depicts a first schematic of a signal conditioning module and a determination module according to one aspect of the present disclosure.

[0045] FIG. 8B depicts a second schematic of a signal conditioning module and a determination module according to one aspect of the present disclosure.

[0046] FIG. 8C depicts a third schematic of a signal conditioning module and a determination module according to one aspect of the present disclosure. [0047] FIG. 8D depicts a chip layout of an integrated circuit according to one aspect of the present disclosure.

[0048] FIG. 9 depicts a table of exemplary performance results of a synchrony metric calculation system according to one aspect of the present disclosure.

[0049] FIG. 10 depicts a graph of exemplary performance results of the synchrony metric calculation system.

[0050] FIG. 11 depicts an application specific integrated circuit according to one aspect of the present disclosure.

[0051] FIG. 12A depicts a schematic of a phase extraction module according to one aspect of the present disclosure.

[0052] FIG. 12B depicts phase errors, error correction, and phase with linear approximation according to one aspect of the present disclosure.

[0053] FIG. 12C depicts experimental measurement comparisons, phase errors, and area and power comparisons according to one aspect of the present disclosure.

[0054] FIG. 13 A depicts a schematic of a determination module according to one aspect of the present disclosure.

[0055] FIG. 13B depicts graphs of exemplary performance results of the determination module of FIG. 13 A.

[0056] FIG. 13C depicts a schematic of a phase-locking detector and stimulation control according to one aspect of the present disclosure.

[0057] FIG. 14 depicts a schematic of a stimulator module according to one aspect of the present disclosure.

[0058] FIG. 15A depicts experimental measurements of input-referred noise according to one aspect of the present disclosure.

[0059] FIG. 15B depicts experimental measurements of gain and gain mismatch according to one aspect of the present disclosure.

[0060] FIG. 15C depicts experimental measurements of stimulation according to one aspect of the present disclosure.

[0061] FIG. 16 depicts area and power comparisons for an application specific integrated circuit according to one aspect of the present disclosure. DETAILED DESCRIPTION

[0062] Clinical treatments of psychiatric conditions related to faulty brain circuit connectivity, such as mental health conditions including depression, post-traumatic stress disorder (“PTSD”), and addictions, are limited due to the lack of established treatment paradigms and appropriate deep brain stimulation (“DBS”) devices. In particular, synchronized neural activity can be an important mechanism for communication between brain networks. These networks, however, are often impaired by the aforementioned psychiatric disorders, among other (e.g., autism, obsessive compulsive disorder, and the like). It is recognized herein that deep brain stimulation (DBS) can be utilized to address these, and other disorders.

[0063] As such, the present disclosure provides systems and methods for controlling brain activity using stimulation, such as electrical stimulation. In particular, a novel approach is introduced whereby a closed-loop and on demand implantable neuromodulation system and method can be used to treat neurological, psychological, and other connectivity-related brain conditions. The neuromodulation system senses brain activity, such as connectivity (e.g., synchrony) between two or more regions of a subject’s brain, and delivers bursts or pulses of brain stimulation. The brain stimulation can be linked with precise (e.g., sub-millisecond) timing relative to ongoing neural events, such as the phase of ongoing oscillations in one or more areas or bursts of neural activity in one or more areas.

[0064] As will be described, connectivity between different regions of a subject's brain can be monitored and modified to restore an out-of-range connectivity level and return the connectivity level within a predetermined therapeutic range. Specifically, a stimulation pulse, train of pulses, paired pulse, or train of paired pulses can be delivered to one or more regions of the brain based on the connectivity level between two or more regions of the brain. Coherence or other indicators quantifying a connectivity between the two regions may be increased, decreased, or show changes in the signal variability over time. As used herein, “connectivity” can encompass synchrony metrics such as phase-amplitude coupling (“PAC”), phase-phase coupling (phase-locking value “PLV”, coherence, phase lag index “PLI”), amplitude-amplitude coupling, or similar generalizations of correlation and cross-spectral operators. In another non-limiting example, connectivity may be defined as an active measurement performed by injecting a perturbation into one or more brain regions (e.g., a pulse or train of active stimulation) and recording the response to that perturbation in one or more brain regions (e.g., a stimulation-evoked potential). “ Connectivity” may also include the application of a linear or non-linear transformation (e.g., a graph theoretical metric) to raw values computed from those operators. Those transformations may be computed in part by machine learning or other automatic optimization algorithms.

[0065] Neurostimulation technologies like cortical and deep brain stimulation (“DBS”) can be used to target dysfunctional brain circuits that cause neurological and neuropsychiatric symptoms. Neural signal oscillations are important to effective neurostimulation. For example, clinically effective DBS in psychiatric and movement disorders, can be associated with changes in neural signal power and in synchrony of neural oscillations between brain structures. Similarly, local field potential (“LFP”) synchrony can be a fundamental mechanism for interregional or within-region communication. Indeed, mental disorders seem to arise less from dysfunction of any single brain region, than from communication failures between brain regions. However, while the neuroscience community has repeatedly called for a broader focus on networks, conventional platforms cannot effectively measure network function, in part because they are overly optimized to detect conditions that arise from focal brain lesions.

[0066] To control synchrony, e.g., by locking electrical stimulation of a “downstream” region to the phase of an “upstream” region, phase determination must be performed. Conventional implantable medical devices have not been able to determine such phase estimations as the complex number and trigonometric calculations utilized are computationally intensive and expensive. The present disclosure provides, as will be described herein, a system that can estimate phase-related quantities (e.g., signal magnitude and phase, phase-locking value, phase-amplitude coupling) in real time. In addition, the system can estimate phase-related quantities from 64 neural channels, or more. Providing such a system in an implant imparts limitations on power, and the system described herein can estimate phase-related quantities within an implant-feasible power budget.

[0067] There are several candidate methods for phase extraction in hardware, with trade-offs in terms of power, silicon area, accuracy, and latency. A hardware implementation can use field- programmable gate arrays (“FPGA”), which are far outside the power budget and size of an implantable system. A discrete distance approximation (“DDA”) can be used to estimate synchrony without trigonometric functions, but it cannot accurately compute phase for stimulation. Similarly, a coordinate rotation digital computer (“CORDIC”) processor can be used to estimate synchrony, but it requires iterative shift-and-add operations with multi-stage pipelining and many clock cycles, increasing system latency in a way that prevents effective phase-locked stimulation.

[0068] Systems and methods according to various embodiments of the present technology may combine signal conditioning, digitization, and filtering, with phase extraction. The proposed systems and methods described herein can measure phase related metrics and control neural oscillation synchrony between subsets of neural channels, and is scalable to high-channel- count architectures (64 channels or more).

[0069] Fig. 1 is a block diagram of an exemplary stimulation system 100 in accordance with an embodiment. As shown, the stimulation system may generally include a stimulation assembly 102 and a controller 104 in communication with the stimulation assembly 102. The stimulation assembly 102 may include a number of stimulators 106 configured to monitor and deliver stimulations to record and control brain activity in the subject. The stimulators 106 may include deep brain stimulation electrodes. For example, the stimulators 106 can include multiple intracranial leads tunneled and connected to a cranial, sub-clavicular implant site. The stimulation assembly 102, or stimulators 106 therein, may be wholly or partially implanted in a patient's skull, scalp, or both, or the entire system 100 may be non-invasive and placed near or on the patient’s body. The stimulation system may encompass a wide range of modes of energy delivery, including but not limited to, optical, electrical, magnetic, sonic, and thermal energy.

[0070] The stimulators 106 can include one or more cortical leads and one or more subcortical leads. According to one non-limiting example, the stimulators 106 can include three cortical leads and three subcortical leads. The stimulators 106 can include an electrode array sufficient for stimulation and sensing. According to one non-limiting example, a cortical array can include a 1x4 or 2x4 actuator array and a subcortical lead can include a 1x4 or a 1x8 actuator array. According to another non-limiting example, a cortical array can include a 1x4 or 2x4 actuator array and a subcortical array can include two segmented subcortical leads (e.g., in a 1-3 -3-1 or a 3x4 configuration). The actuator array on the stimulators 106 can define a spacing between electrodes of between about 0.5 mm and about 2 mm. The actuator array on the stimulators 106 can define an actuator length of between about 0.5 mm and about 3 mm. The lead of the stimulators 106 can define a length of at least 40 cm. The lead of the stimulators 106 can define a diameter between about 0.1 mm to 2 mm. In a particularly preferred embodiment, the lead of the stimulators 106 can define a diameter of between about 1.2 mm and about 1.3 mm. [0071] The controller 104 may generally include a processor 108, a memory 110, such as flash or other type of memory, a communication module 112, signal generation/signal detection modules 114, a real-time clock 116, and optionally a power source (not shown). According to some implementations, the controller 104 can include a signal processing application specific integrated circuit 1100 (“ASIC”, see Fig. 11), which will be described in detail herein. The ASIC 1100 can be configured to control the brain sensing (e.g., monitoring) and brain stimulation algorithms described herein. As shown, the controller 104 may also include various connections, or terminals 118 for transmitting signals generated by the signal generation module 114. Any or all of these elements may be implanted into a patient's body or carried/worn externally to the body, or some elements may be used in each configuration with an appropriate interconnection system. According to some implementations, the controller 104 can be included within the stimulation assembly 102. According to other implementations, the controller 104 can be remote from the stimulation assembly 102.

[0072] In some implementations, the controller 104 may also include, or be in communication with, a graphical user interface (“GUI”) 105 including an input 107 for accepting user selections, operational instructions and information, as well as an output 109 or display for providing a report or displaying recorded data. The GUI 105 can be configured as a laptop, tablet, or computer, among others. The input 107 may include various user interface elements, such as a mouse, keyboard, touchpad, touch screen, buttons, and the like. The input 107 may also include various drives and receptacles, such as flash-drives, USB drives, CD/DVD drives, and other computer-readable medium receptacles, for receiving various data and information. To this end, the input 107 may also include various communication ports and modules (e.g., communication module 112), such as Ethernet, Bluetooth, or WiFi, for exchanging data and information with various external computers, systems, devices, machines, mainframes, servers or networks. The GUI 105 can provide the ability to configure sensing and triggering functions of the system 100.

[0073] The processor 108 may be configured or programmed to perform a variety of functions for operating the controller 104 using instructions stored in memory 110, in the form of a non- transitory computer readable medium, or instructions received via input. In some implementations, the processor 108 may control the sending and receiving of instructions and operational parameters (for example, via a wireless transcutaneous link in the communication module 112), the storage of the operational or stimulation parameters and instructions in memory 110, the transmission of the operational parameters to signal generators in the signal generation module 114, the selective triggering of the signal generators to provide electrical, and other types of stimulations, to various brain regions or tissues of a subject, as well as synchronizing various functions using the real-time clock 116. By way of example, the processor 108 can be a programmable microprocessor, microcomputer, or application specific analog and/or digital integrated circuits and/or hardware and software modules. For instance, the controller 104 may communicate with the real-time clock 116 to determine the timing, phase or phase lag, and synchronization of various stimulations. The controller 104 may also communicate with the real-time clock 116, as well as other hardware and digital logic circuitry, to accurately store activation times in memory 110 and provide activation counts. The system 100 can generate a clock signal from the real-time clock 116 for onboard components including the controller 104 and the processor 108, which can provide tracking of wall time/date to identify the timing of relevant clinical events. The controller 104 can also resynchronize that clock to an external source (e.g., to the clinician programmer).

[0074] The signal generation module 114, in communication with the processor 108, may include a number of signal generators for providing activating signals to the stimulators 106. In some implementations, each of the stimulators 106 may be individually controlled using separate signal generators. The signal generators can be independently operated, either sequentially or concomitantly, by the processor 108, to provide stimulation signals with various intensities, frequencies, phases, pulse widths, durations and waveforms. In one embodiment, the signal generators may be controlled to provide stimulations in accordance with the methods described below with respect to FIGs. 2-4. In addition, in some implementations, the signal generation module 114 may include an output sensing circuit to monitor contact output, as well as other failsafe mechanisms.

[0075] The signal detection module 114 may include various hardware, and be configured to detect brain signals acquired using the stimulation assembly 102. For instance, the signal detection module 114 can include various analog-to-digital converters, voltage/current meters, amplifiers, filters, and other elements. Signals from the signal detection module 114 may then be provided as input and processed by the processor 108. Alternatively, the signals may be stored in the memory 110 and subsequently accessed/processed by the processor 108. As will be described in detail herein, the signal generation/detection module 114, processor 108, and other aspects of the controller 104 can be configured as, included on, or in communication with, an application-specific integrated circuit (“ASIC”) for execution of the methods described herein or for use with the system 100 described herein.

[0076] In some aspects, the processor 108 may receive signals corresponding to brain activity in one or more regions of a subject's brain as input from the stimulation assembly 102 received through the signal detection module 114. The processor 108 may then analyze the signals, for example, to determine a connectivity between two or more brain regions being monitored by the stimulation assembly 102, for example, by computing various metrics indicative of connectivity, such as coherence, evoked potentials, and others or to determine (or detect) a phase of oscillation of one or more brain regions. In some aspects, the processor 108 may receive such information from various input elements configured on the controller 104, as described, or alternatively from an external or remote device, computer or system, by way of the communication module 112 (e.g., an EEG). The processor 108 may also access a reference or database, as described, stored locally in the memory 110, or at storage location. As will be described herein, the controller 104 may operate in a closed-loop fashion to control brain activity in a subject by operating or instructing the signal generation module 114 to provide targeted stimulations in response to measured connectivity levels between two or more regions of a subject’s brain, or in response to specific activity in one or more regions of a subject’s brain.

[0077] In some implementations, the controller 104, along with the stimulation assembly 102, may be part of a standalone stimulation system. Alternatively, the controller 104 may be a wearable or implantable unit (e.g., a rechargeable implantable neurostimulator, “INS”) that is programmable or configurable using an external device, computer or system. To this end, the communication module 112 may be configured to send and receive various signals, as well as receive power. Specifically, the communication module 112 may include an antenna, or an input-output wire coil, a receiver and transmitter, data converters, as well as other hardware components. As a nonlimiting example, the receiver and transmitter may be configured to receive and transmit radiofrequency (RF) signals. In some implementations, the antenna may be configured for transcutaneous wireless two-way communication with an external wearable device, sending and receiving signals when the external wearable device is placed in close proximity. The communication signals may be transmitted through magnetic induction and include information for operating and/or programming the processor 108. For instance, the communication signals may include triggers or command signals for generating stimulations. In some aspects, transmitted signals may also be configured to power or recharge battery components powering the controller 104. The antenna may be connected to a receiver and transmitter, which in turn may be connected to serial-to-parallel and parallel-to-serial data convertors, respectively. Any information sent or received, as described, may then be processed by the processor 108.

[0078] The INS can include four contacts on each of the four leads, and in some implementations, eight contacts on each of the four leads. The leads can define a lead contact impedance of under 5 kOhm, and in some cases, under 2 kOhm. According to one non-limiting example, the INS includes two current sources per header, and in some cases, 32 current sources in total. According to one non-limiting example, the INS includes four recording channels per header, and in some cases, 32 recording channels in total. The INS can be configured to provide a stimulation amplitude between 0 and 8 mA, and in some cases, 0 to 25 mA. The INS can be configured to provide a stimulation frequency between 0 and 200 Hz, and in some cases, 0 to 10,000 Hz. As will be described, the INS (e.g., stimulators 106) can be configured to provide stimulation triggered upon a user-defined signal phase, and in some cases, provide stimulation triggered randomly relative to a detected event (e.g., a connectivity level being out of range).

[0079] The INS can be configured to provide a stimulation pulse width between 50 and 500 ps, and in some cases, 30 to 1000 ps. The INS can be configured to provide a stimulation waveform with a variety of patterns. Examples may include square, sinusoidal, or a sawtooth pattern. The INS can be configured to provide a stimulation in a response time within 250 ps, and in some cases, within 50 ps. The INS can be configured to provide stimulation capable of randomizing the delay between an event/trigger and stimulation onset. In some cases the delay is between 1 and 100 ms, in some cases between 1 and 1000 ms, in a uniform or non-uniform distribution. The INS can be configured to provide real-time data streaming of, for example, eight channels of data at 1kHz, and in some cases, up to 64 channels of data.

[0080] As mentioned, the controller 104 may be powered by an internal and/or external power source. For example, an internal source may include a standard rechargeable battery, comparable to batteries used in implantable devices (e.g., pacemakers). Alternatively, or additionally, the internal power source may include a capacitor in combination with a regulator, such as a single ended primary inductor converter or dc-dc converter, that together can generate a constant current or voltage output for short periods of time. In some implementations, the capacitor may be charged by an external wearable device. As such, the controller 104 may include an induction coil, or thin, tightly wound wire that allows for RF telemetry and/or battery recharge by an external wearable device, configured either as part of the communication module 112, or as separate hardware. Other methods of charging, such as ultrasonic power transfer, may also be utilized.

[0081] Fig. 2 illustrates a method for controlling connectivity levels 200 in a plurality of brain regions by providing targeted stimulations in accordance with an embodiment. The method may be carried out using any suitable device, apparatus or system, such as the stimulation system 100 described above with respect to Fig. 1. In some embodiments, the method may be implemented as a program, software or instructions stored in a memory such as a non-transitory computer readable medium or other storage location, that are executable, at least in part, by the processor 108.

[0082] At block 202, the method may optionally begin with positioning stimulators (e.g., implanting DBS stimulators, positioning non-invasive transducers) to stimulate a subject's brain. In an embodiment, a number of stimulators (e.g., stimulators 106 shown in Fig. 1) may be positioned to stimulate more than one target region of the subject's brain. For example, the stimulators may be positions to stimulate two or more target regions. For example, a first stimulator 106 can be placed at a first target region and a second stimulator 106 can be placed at a second target region, and so on (including third, fourth, and fifth target regions, etc.). The first and second target regions may be separate regions of the brain and may or may not spatially overlap. However, positioning or implantation need not be carried out during execution of the process, but rather during a prior procedure or intervention.

[0083] At block 204, signals corresponding to connectivity between the first and second target regions of the subject's brain are received, for example, by the signal detection module 114 of the controller 104 (shown in Fig. 1). As noted above, the signals may be spontaneous or may be evoked by delivery of any modality of stimulus, including visual/auditory or other sensory stimuli. According to one non-limiting example, the signals can be LFP within at least one predetermined frequency band. The received signals can be sent to the processor 108. At block 206, the received signals are measured and calculated by the processor 108 to determine a connectivity level between the first and second target regions. For example, the phase of the signals from the first and second target regions can be determined and the connectivity level can be a calculated phase-locking value (“PLV”) between the first and second target regions for the brain. According to another nonlimiting example, the connectivity level is a phase-amplitude coupling value determined from the phase of the received signals from the first target region and the amplitude or power of the received signals from the second target region. At block 208, the measured connectivity level can be compared to a predetermined desired therapeutic range. For example, the measured connectivity level can be a dimensionless parameter between 0 and 1. The dimensionless parameter can be based on a normalization of sensed signals to a prior baseline, to phase-amplitude coupling, coherence, or phase-locking value. According to some implementations, the predetermined therapeutic range can be subject specific and/or be determined and input by a clinician performing the stimulation.

[0084] If the measured connectivity level is within the predetermined therapeutic range, the method returns to block 206 to continue measurement and calculation of the connectivity level between the first and second target regions (e.g., without providing stimulation). According to some embodiments, there may be a period of delay between measurements, which may range anywhere from 1 millisecond to many hours. For instance, the therapy may be configured to sample in duty cycles of 1 minute out of every 10-60 minutes, or of 10 minutes out of every 60- 300 minutes. If the measured connectivity level is outside the predetermined therapeutic range, the method proceeds to block 210 to deliver a stimulation to one or more of the first and second target regions of a subject’s brain. That is, the system remains in a sense/record/monitor mode (e.g., for approximately 90% of a treatment, or more), and transitions into a stimulation mode upon the determination of an event that requires stimulation. For example, determining that a measured connectivity level is out of a predetermined range and has remained so for an adequate duration of time. In that way, the method provides responsive stimulation that is based on connectivity levels between brain regions.

[0085] According to some implementations, the stimulations may be time-locked to the phase of an oscillation in one or more of the first or second target region (see, e.g., Figs. 5 and 6C). For example, the stimulation may be delivered using the stimulators 106 as shown in Fig. 1. According to some implementations, a response time (e.g., delay) of the stimulation relative to the determination that the measured connectivity level is outside the predetermined therapeutic range can be between about 50 ps and about 250 s. It may frequently be advantageous for this delay to be in the range of 1 to 100 ms, to leverage timing dependent plasticity principles. In other implementations, the stimulation may be time-locked to a change in amplitude of an oscillation in one or more brain regions (e.g., from the first or second target region), or to a rise in voltage that signifies a change in tissue excitability. Oscillatory phase, amplitude, or any combination of these may be weighted and combined between one or more regions to determine stimulation. In a nonlimiting example, the amplitude and phase of a region may both be tracked. For example, stimulation may be delivered at a target oscillatory phase (e.g., 180 degrees), but only when the amplitude/power of the same oscillation is above a predetermined amplitude/power threshold. The specific oscillatory phase to be targeted may be selected by a clinician on the basis of specific properties or observed responses of the measured brain structures. This may include the response to test stimulations. For example, the controller 104 can detect the phase of a signal, however if the amplitude of that signal is below a predetermined amplitude threshold, stimulation will not be delivered. This can ensure that the phase detection is of high quality. In some examples, this timing may change after each detection event, e.g. being randomized according to a pre-specified distribution. For example, the stimulation may be delivered at a target oscillatory phase, where that target phase is randomized from one stimulation to the next. That is, a stimulation pulse can be delivered at a phase that is randomized and different from the target phase of a previously delivered stimulation pulse.

[0086] According to other implementations, the stimulations may be time-locked to a change in activity level of one or more brain regions. For example, the stimulation may be time locked to a change in the overall activity level of one or more regions of the brain. This activity level may be represented as a change in an oscillation, as in the prior examples, or may reflect an alternate measure of neural activity such as a voltage or other physical signal produced by the brain. The desired activity level may be an increase or decrease beyond a user-specified threshold, and there may optionally be a requirement that the increase or decrease persist for a user-specified amount of time. Upon detection of this change in activity, stimulation may be delivered to one or more brain regions with timing relative to the change. The timing or delay between detection and stimulation can be between about 50 ps and about 250 s. It may frequently be advantageous for this delay to be in the range of 1 to 100 ms, to leverage timing dependent plasticity principles. In some examples, the timing of stimulation may change after each detection event, e.g. being randomized according to a pre-specified distribution.

[0087] In an embodiment, a stimulation may be delivered to one or more of the first and second target regions. For example, a stimulation may be delivered to a first target region and a second target region. The stimulation (e.g., electrical or other modality of stimulation) may be monophasic or biphasic, with the stimulation having any waveform or shape. The stimulation may be a single pulse, trains of pulses, continuous, or intermittent in the form of current or voltages, light, and so on, having various amplitudes, frequencies, periods, waveforms, durations, phases, polarities, and so on. For example, a stimulation pulse or train of pulses may be delivered to one or more target regions. Specifically, a first pulse or train of pulses can be delivered to the first region and a second pulse or train of pulses can be delivered to the second region. The stimulation pulse can define a pulse width between about 30 ps and about 50,000 ps. In other examples, the pulse widths can be in the range of 50 ps to 250 ps in applications involving electrical stimulation, or of 10-20 ms (10,000-20,000 ps) in applications involving light stimulation. According to some implementations, a patterned stimulation can be delivered to one or more brain areas, for example, a paired pulse or paired pulse train. For example, a first pulse (or train) can be delivered to a first region and a second pulse (or train) can be simultaneously delivered to a second region, thereby pairing the first and second pulses. The timing between pulses within a train and/or between pulses of different trains may be controlled in a precise fashion to achieve a desired response.

[0088] According to some implementations, the stimulation period can be between about 0.1 seconds to about 1,000 seconds. It may be particularly advantageous for brief stimulation periods to correspond to the measurement period of an oscillation of interest, in the range of 0.5 to 5 ms. It may similarly be advantageous for stimulation periods to be below the limit of human detection, constrained to 5 seconds or less. According to some implementations, the stimulation amplitude may be between about 0 and about 25 mA. In some implementations, the stimulation frequency can be between about 1 Hz to about 10,000 Hz. In one embodiment, a user may select preprogrammed stimulation parameters such as target frequencies, intensities, durations, timings, and so on. Other information may be taken into consideration when setting the parameters of the stimulation such as a condition or disorder of the subject, targeted structures or regions in the brain, and properties (e.g., electrical, optical, magnetic) of such regions. In an embodiment, a user may also provide selections indicative of such targeted regions, tissue properties, subject disorder or conditions, and so on. In one such example, the stimulation frequencies may be chosen to match a target oscillation present within the targeted tissue. For instance, frequencies of the beta frequency band (15-30 Hz) may be targeted for disorders involving movement, whereas frequencies of the theta (5-8 Hz) and alpha (8-15 Hz) bands may be targeted for disorders involving long range communication in cognitive circuits. [0089] The stimulation may be part of a stimulation sequence designed to provide more than one stimulation (e.g., pulse, paired pulse, pulse train, or paired pulse train) over a selected or determined period of time. In an embodiment, the predetermined phase for the source region used to trigger delivery of a stimulation pulse to the target region is the same phase value or the same phase range for each stimulation pulse in the stimulation sequence. In another embodiment, the predetermined phase or predetermined phase range used to trigger delivery of a stimulation pulse to the target region may change or vary for each stimulation pulse. In another embodiment, the timing in seconds rather than the phase angle may be controlled and/or varied.

[0090] With continued reference to Fig. 2, if the stimulation therapy is not complete at block 212, the process returns to block 206. If the measured connectivity level is not within the predetermined therapeutic range at block 208, the stimulation continues (block 210) until the connectivity level is within the predetermined therapeutic range. The number of loops between steps 206 and 212 that are executed (e.g., by the system 100 of Fig. 1) can be predetermined or set by a clinician, and can be considered the “dosing” of the stimulation therapy. For example, the stimulation therapy can be set to execute between 1 and 200 loops of the method 200. As illustrated, the sensing and stimulation is closed-loop, whereby the stimulation is based on, and triggered, by a measured parameter (e.g., phase, PLV, amplitude, etc.).

[0091] Returning to Fig. 2, if the stimulation therapy is complete at block 212, a report may optionally be generated and displayed (e.g., by the GUI 105 of Fig. 1) at block 214. The report may be in any form and include any information including any stimulations, parameters thereof, or measurements acquired from a subject. In some aspects, the report may include the selected stimulation sequence in the form of instructions, executable by a stimulation system. The report may include measurements such as, for example, local field potential (LFP) measurements, electroencephalogram (EEG) measurements, single-neuron measurements, multi-neuron measurements, spike measurements, optical measurements, sonic measurements and others. The report may also include various metrics of connectivity that may be generated based on one or more such measurements. The metrics of connectivity may include evoked potentials or oscillations, coherence, cross-correlations, multi-signal computations, principal-component computations, and so on. In one aspect, coherence between regions of the brain may be computed using respective LFP signals, which may then be used to determine a connectivity or a connectivity between the regions. The metrics of connectivity may be used to select parameters for further application of the methods for stimulation described herein.

[0092] Fig. 3 illustrates an optional or alternative configuration for the method 200 for controlling connectivity levels of Fig. 2. In the illustrated method, like reference numerals correspond to previously described blocks of method 200. For example, at block 208, the measured connectivity level can be compared to a predetermined desired therapeutic range. If the measured connectivity level is within the predetermined therapeutic range, the method returns to block 206 to continue measurement and calculation of the connectivity level between the first and second target regions. If the measured connectivity level is outside the predetermined therapeutic range, the method 200 can proceed to block 218 where the processor 108 sends a first signal (e.g., an “enable stim” signal or “ENSTIM” signal) to the signal generation module 114 to command the signal generation module 114 to start the delivery of stimulation. According to one implementation, the first signal is sent between 1 ps to 50 ms of the determination connectivity level is outside the predetermined therapeutic range. Optionally, at block 220, the processor 108 can simultaneously send a signal to the signal detection module 114 to command the signal detection module 114 to temporarily stop or pause the recording or monitoring of brain signals. According to one implementation, the recording is paused within 1 ms of the determination that connectivity level is outside the predetermined therapeutic range. This can, for example, protect sensitive sensing circuitry to be protected and inoperable during high-energy stimulation.

[0093] The method 200 can then proceed to block 210 to deliver a stimulation to one or more target regions of a subject’s brain. At block 222, the processor 108 can send a second signal (e.g., a “high” signal) to the signal detection module 114 to command the signal detection module 114 to restart the recording of brain signals. According to one implementation, the second signal is sent within 10 ms of the completion of the stimulation. According to one implementation, the recording of brain signals resumes within 1 ms of receiving the second signal. Next, at block 224, the processor 108 can send a third signal (e.g., a “low” signal) to the signal detection module 114 to begin monitoring/calculating the connectivity level between the first and second target regions. According to some implementations, a predetermined delay between the second signal and the third signal is implemented. The predetermined delay can be application-specific. According to one implementation, the monitoring of the connectivity levels begins within 100 ms of receiving the third signal. The method 200 can then proceed to block 212 and proceed with the method 200 previously described with respect to Fig 2.

[0094] Fig. 4 illustrates an exemplary method for determining the phase of oscillations in a target region in accordance with an embodiment. The method can be executed by the controller 104 of the system 100 of Fig. 1 previously described (e.g., by the ASIC 1100 described herein with respect to Fig. 11). The determined phase of oscillations may be used in order to provide stimulations that are time-locked to the phase of oscillations (e.g., providing stimulation at 180 degrees). The signal detection module 114 (see Fig. 1) can be used to determine (or detect) the phase of oscillations of a desired brain region in a predetermined frequency band. Various known methods may be used to detect the phase of oscillations such as, for example, sliding-window Fourier transforms, all-pass Hilbert filters or latent-variable or state-space tracking methods. In one embodiment, a continuous phase estimation method is used to determine the phase of the source signals and to minimize error from the desired region and variance in the stimulation phases. [0095] Referring to Fig. 4, at block 302 signals corresponding to brain activity may be received from the desired region. At block 304, a bandpass filter is applied to the signals to generate filtered signals. At block 306, predicted future filtered signals are generated by using an autoregressive method on the filtered signals. At block 308, phase information is extracted from the filtered signals (including both the filtered signals and the predicted future filtered signals) by applying a Hilbert transform. In an embodiment, current samples from the filtered signals are centered to minimize edge distortion. At block 310, the extracted phase information is used to detect the phase of oscillations for the current samples or time points for the desired region. In an embodiment, the method may output a phase for each input sample ("continuously"), thereby reducing stimulation delay.

[0096] Fig. 5 illustrates timing of stimulation pulses in a target region (e.g., one or both of the first and second target regions) based on a phase of oscillation in from a desired brain region (e.g., a separate “source” region, or one of the first or second target regions) in accordance with an embodiment. The phase can be extracted utilizing, for example, the method described with respect to Fig. 4 or with the ASIC 1100 described herein with respect to Fig. 11. In Fig. 5, the predetermined phase (e.g., about 180 degrees) or the predetermined phase range (e.g., between 0 and 360 degrees) is used to trigger a stimulation pulse for a target region is the same for each stimulation pulse in a stimulation sequence 404. This may be selected on an individual basis for a patient and brain area, for example by computing a phase response curve and identifying a phase at which the effects of stimulation are optimal. In one specific and non-limiting example, the phase of source signals 402 for a source region may be monitored in a specific frequency band (e.g., the theta band 4-8 Hz) to determine when the phase of the source signal is at or near 180°. When the phase of oscillation is equal to or near 180° at a first predetermined phase occurrence 406, a first stimulation pulse 408 is delivered to the target region. A second predetermined phase occurrence 410 triggers delivery of a second stimulation pulse 412 to the target region and a third predetermined phase occurrence 414 triggers delivery of a third stimulation pulse 416 to the target region. As discussed above, the stimulation sequence 404 affects the connectivity level between two or more brain regions, and the stimulation can be repeated until the connectivity level is restored to be within a predetermined therapeutic range. This similar example could generalize to a wide range of other frequencies, for instance to delta (1-4 Hz), alpha (8-15 Hz), beta (15-30 Hz), gamma (30-50 Hz), broadband gamma (50-200+ Hz), or spindle (-200 Hz) oscillations. According to some examples, the frequency bands can be in the range of 5-15 Hz, 15-30 Hz, and 30-200 Hz. [0097] Figs. 6A-6D illustrates one specific non-limiting implementation of the systems and methods previously described herein utilized on a rodent model (Long-Evans rats), as executed by the ASIC 1100 described below with respect to Fig. 11 integrated into the system 100 described above. Figs. 6A-6D demonstrates 16-channel LFP recording and phase-locked stimulation operating in two modes: a first mode where stimulation is delivered at a target oscillatory phase (e.g., 180 degrees), and a second mode where stimulation is delivered at a target oscillatory phase if the connectivity level (e.g., PLV) between first and second regions of the brain is outside a predetermined therapeutic range. In the illustrated non-limiting examples of Figs. 6A-6D, two custom electrode arrays (8 recording and 2 stimulation channels in each) were implanted into the infralimbic cortex (IL) and basolateral amygdala (BLA). The power spectral density “PSD” of 16- channel input-referred LFP exhibits prominent 1/f-shaped spectrum (see Fig. 6A). Simultaneous recording using the ASIC 1100 (e.g., “SoC”) described below integrated into the system 100 described above compared to recording using a commercial device (Intan 32-ch headstage #C3314) verifies accurate measurement of LFP activity (see Fig. 6B). To demonstrate the phase- locked stimulation capabilities of the system 100, and the ASIC 1100 described herein, the system was operated in the first mode (see Fig. 6C) and stimulation was targeted at a specific phase (e.g., 180°) of a predetermined frequency band LFP (e.g., theta band, 4-8Hz). In this illustrated non- limiting example, the theta band LFP is known to correlate with fear- and anxiety-like behavior. The system was then operated in the second mode (see Fig. 6D), where theta-band phase- and PLV-locked stimulation was further demonstrated. For both non-limiting examples, the maximum stimulation frequency was set to 6Hz, and the phase-locking detector was controlled such that phase wrapping did not trigger the stimulation.

[0098] As illustrated in Fig. 6C, theta band LFP can be monitored in one or both of a first or second target region by the stimulation detection module 114 of the system 100. The controller 104 (e.g., the ASIC 1100 described below) can extract the phase from the signal. The controller 104 can then determine the points at which the phase of oscillation of the signal is at a predetermined phase, in this example, 180 degrees. The controller 104 can then command the stimulation generation module 114 to apply a stimulation to one or both of the first or second target region that is time-locked to the predetermined phase.

[0099] As illustrated in Fig. 6D, theta band LFP can be monitored in one or both of a first or second target region by the stimulation detection module 114 of the system 100. The controller 104 (e.g., the ASIC 1100 described below) can extract the phase from the signal. The controller 104 can then determine the points at which the phase of oscillation of the signal is at a predetermined phase, in this example, 180 degrees. The controller 104 can then calculate the PLV in the phase signals between the first and second target regions and determine if the PLV is outside of a predetermined therapeutic range. In this example, the therapeutic range is between 0 and 0.5. If the PLV is outside the therapeutic range (e.g., greater than 0.5), the controller 104 can then command the stimulation generation module 114 to apply a stimulation to one or both of the first or second target region that is time-locked to the predetermined phase only if the PLV is outside the therapeutic range. As illustrated in Fig. 6D, this targeted, responsive stimulation elicits a reduction in the connectivity level between the first and second target regions, as shown by a reduction in PLV post-stimulation.

[0100] According to another implementation, a method for determining an increase or decrease in connectivity, and tying that increase or decrease with targeted stimulation is provided. For example, abnormal connectivity (e.g., PLV) can be measured between two or more regions of a subject’s brain (e.g., signal generation/signal detection modules 114). A change (i.e., increase or decrease) in connectivity can then be detected in a first brain region of the subject’s brain. The stimulators 106 (Fig. 1), using the signal generation module 114, can then deliver stimulation to the first brain region. According to some implementations, the brain stimulation can be delivered relative to an increase or decrease in the detected connectivity level. The method may then repeat the detection and stimulation delivery steps a predetermined number of times. The method may then proceed with continued measurements of the abnormal connectivity until the connectivity has normalized.

[0101] As described above, aspects of the controller 104 of the system 100 can be integrated into an application-specific integrated circuit (“ASIC”), which can facilitate accurate, low-power phase extraction that implements low-power hardware-efficient algorithms for complex-number calculations. An ASIC according to various embodiments can define a chip of less than 1 mm ² area and require a supply voltage of about 0.8 V. The proposed application-specific integrated circuit can also define a power consumption of less than 100 pW. This application-specific integrated circuit can be installed within a novel stimulation implant (e.g., an INS), with a similar form factor to a DBS. Such an implant with synchrony measurement and closed-loop stimulation capability can benefit many intractable brain disorders such as mental disorders, Parkinson’s disease, and epilepsy. Importantly, previous efforts on open-loop DBS for mental disorders have not met the clinical needs, and systems and methods according to various aspects of the present technology can address this unmet need for treating disorders such as treatment-resistant depression, anxiety, and PTSD, among others.

[0102] According to one aspect of the present disclosure, a hardware-efficient method to estimate the instantaneous phase of neural oscillations is provided. This method overcomes the power-accuracy-latency drawbacks of the conventional methods noted above. As detailed below, this method may be based on a linear arctangent approximation (“LAA”) algorithm to estimate the instantaneous phase of neural oscillations.

[0103] LINEAR ARCTANGENT APPROXIMATION ALGORITHM

[0104] FIG. 7A depicts a simplified block diagram of a signal processing chain 700 for determining (also referred to as “extracting”) phase from an oscillating signal, such as a neural signal. The signal processing chain 700 may comprise any suitable system or method for conditioning the input signal and providing its phase. In some embodiments, a monopolar or bipolar signal, for example from a DBS lead, may be coupled with an amplifier 702. The output of the amplifier 702 may then be converted to a digital signal, for example by an analog-to- digital converter (ADC) 704, and may be filtered for one or more frequency ranges, for example by a bandpass filter 706. In some embodiments, the frequencies passed by the bandpass filter 706 may comprise one or more of Delta (6, approximately l-4Hz), Theta (0, approximately 4- 8Hz), Alpha (a, approximately 8-13Hz), Beta (P, approximately 13-30Hz), Low gamma (low y, approximately 30-50Hz), Gamma (y, approximately 50-80Hz), High gamma (high y, approximately 80-150Hz), Ripple (approximately 150-250Hz), and Fast ripple (approximately 250-500Hz) brain waves.

[0105] The bandpass filter 706 may comprise any suitable system or method for allowing signals with selected range(s) of frequencies to pass from input to output, while preventing unwanted frequencies from passing. The ADC 704 may comprise any suitable analog-to-digital converter and may be configured to output a digital signal of any suitable bit width for the signal processing chain 700. In some embodiments, a neural recording front-end requires at least 7 (in some embodiments, 8) effective number of bits to record neural signals (<lmV LFP) in view of the background noise picked up by the electrodes (-lOuVrms). For amplifiers having nonlinearity, a 9 to 10-bit ADC may be a suitable design choice to achieve 7 to 8 effective number of bits. The accuracy of phases and features measured increases marginally above 10 bits while the hardware complexity grows significantly. In some embodiments the ADC 704 may comprise a 10-bit ADC.

[0106] In some embodiments, the digitized and filtered oscillating signal may then be converted 708 into corresponding real and imaginary components from which phase may be extracted 710. The real (“Tte”) and imaginary parts of oscillating signals may be obtained using any suitable system or method, such as a Hilbert transform, and may be used for instantaneous phase calculations. Phase may be calculated using an arctangent function of the real and imaginary parts. In some embodiments, a Linear Arctangent Approximation (LAA) algorithm, based on a first-order Lagrange interpolation, can approximate the arctangent function to the fraction of Re and Im in the [-7t /4, it /4) range using the following equation:

[0108] The range of the LAA may be extended to [-7t, 7t) radians using trigonometric identities, for example as illustrated in Fig. 7B. In some embodiments, the LAA output phase may be normalized by a radian to [-1, 1). In quadrant I, the expression of the normalized approximation algorithm is , which is extended to four quadrants as shown in the table of Fig. 7B. Each of the four quadrants has a unique offset value and fractional form, which may be added to calculate the final phase. The instantaneous phase of complex numbers in the four quadrants in the complex space can be approximated by the offset value plus the fractional form. [0109] Turning now to FIG. 7C, an embodiment of a phase extraction module 710 implementing a LAA algorithm, which can achieve efficient yet accurate phase extraction, is illustrated. The phase extraction module 710 may also be referred to as “LAA phase extractor” or “LPE.” The phase extraction module 710 may comprise hardware and/or software configured to receive an oscillating signal input and extract the phase. In some embodiments, the phase extraction module 710 may be configured to receive as inputs the real and imaginary components of an oscillating signal and extract the phase using an arctangent function or arctangent approximation. In some embodiments, the phase extraction module 710 may be configured to extract phase using hardware and/or software to perform a LAA. In some embodiments, the phase extraction module 710 may be configured to perform phase extraction in the [0, 0.25) range (normalized) ([0, it /4) radians) in view of the trigonometric identities developed in FIG. 7B.

[0110] In some embodiments, the phase extraction module 710 may comprise a data range reduction module 720, quadrant identification module 730, and arctangent calculation module 740. The data range reduction module 720 may comprise any suitable system or method to restrict the largest of the Re and Im inputs to the arctangent calculation module 740 to the range [0.5, 1). In some embodiments, the data range reduction module 720 may comprise circuitry 722 configured to determine the absolute value of the Re and Im inputs. The output of the absolute value circuitry 722 may be coupled with leading-zero detector circuitry 726 and shifters 724. In some embodiments, the absolute values of 10-bit Re and 7m inputs range between 0 and l-2 ^A (-9). For example, if the absolute value of Re = 000011111 and the absolute value of Im = 000000001, the common four leading zeros are detected, and the two numbers are left-shifted by 4. In this manner, the larger one of the two inputs is restricted between 0.100000000b and 0.111111111b. [OHl] The quadrant identification module 730 may comprise any suitable system or method for determining the quadrant of the input to the phase extraction module 710. In some embodiments, the quadrant identification module 730 may comprise sign detectors 732 coupled to the Re and Im inputs, and a comparator 734 coupled to the output of the absolute value circuitry 722. For example, if the Re and Im inputs are both positive and Im is greater than Re, then the input to the phase extraction module 710 belongs in quadrant II (referring to Fig. 7B). [0112] Referring again to Fig. 7C, the outputs from the data range reduction module 720 and the quadrant identification module 730 may be input into the arctangent calculation module 740. The arctangent calculation module 740 may comprise any suitable system or method for calculating phase angle of the input signal using an arctangent approximation. In some embodiments, the arctangent calculation module 740 may comprise input multiplexers (muxes) 742, a reciprocal lookup table (“reciprocal LUT”) 744, a multiplication module 746, a shifter 748, a linearization lookup table (“linearization LUT”) 750, an offset value module 754, a fraction sign module 756, and an addition module 752.

[0113] The input muxes 742 may be coupled with the output of the shifters 724 of the data range reduction module 720 and may be controlled by the output of the comparator 734. The smaller value may be selected by the input muxes 742 for input to the multiplication module 746, which is thus selected as the numerator based on the relationships derived in Fig. 7B. The larger value may be selected by the input muxes 742 for input to the reciprocal LUT 744, based on the relationships derived in Fig. 7B. The reciprocal LUT 744 may comprise any suitable hardware or software memory or storage structure configured to output the reciprocal value of the input. The size of the reciprocal LUT 744 can be reduced in size by restricting the input range using the data range reduction module 720. In one specific non-limiting example, for a 10-bit LAA implementation, the size of the reciprocal LUT 744 can be reduced to 2 ⁸ * 9 bits by restricting the input range to [0.5, 1) using the data range reduction module 720.

[0114] In some embodiments, the fraction part can be calculated using the multiplication module 746 to multiply the numerator selected by the input muxes 742 with the output of the reciprocal LUT 744, as opposed to a complex division function. The multiplication module 746 may comprise any suitable system or method for multiplying two inputs, for example binary inputs. In some embodiments, the output of the multiplication module 746 may be shifted right by 2 bits by shifter 748, to accomplish dividing the output of the multiplication module 746 by 4 as in Eq. (1). In some other embodiments, the shifter 748 may be coupled between the output of the reciprocal LUT 744 and the multiplication module. In yet other embodiments, the division by 4 may be accomplished with the reciprocal LUT 744. [0115] The fractions may have nonlinear phase errors due to the nonlinear nature of the arctangent function (see Fig. 7D). In some embodiments, a linearization LUT 750 can be implemented after the reciprocal LUT 744 to compensate for these nonlinear phase errors. The linearization LUT 744 may comprise any suitable hardware or software memory or storage structure configured to output a corrected value corresponding to the input value. In one specific non-limiting example, for a 10-bit LAA implementation, the periodicity of the phase errors can be exploited to reduce the size of the linearization LUT 746 to 2 ⁸ * 7 bits. In an exemplary embodiment, the linearization LUT 750 may be coupled with the output of the shifter 748. By placing the linearization LUT 750 after the shifter 748, the bit width of the linearization LUT 750 input, for an exemplary 10-bit LAA implementation, is reduced to 8 bits, reducing the size of the linearization LUT 750.

[0116] In some embodiments, an appropriate offset value and fraction sign can be selected (referring to Fig. 7B) by the arctangent calculation module 740. In some embodiments, the arctangent calculation module 740 may comprise an offset value module 754 for providing the offset value corresponding to the input to the phase extraction module 710, for example as shown in Fig. 7B. The offset value module 754 may comprise any suitable hardware or software for determining, using the output of the comparator 734 and sign detector(s) 732, the offset value and outputting the offset value or an indication of the offset value. In some embodiments, the offset value module 754 may comprise a hardware or software lookup table, a memory (ROM, RAM, etc.), or the like. In some embodiments, the offset value module 754 may comprise logic which outputs an indication to the addition module 752 regarding what value to use as an offset. [0117] In some embodiments, the arctangent calculation module 740 may comprise a fraction sign module 756 for providing a signal indicating whether the fraction determined in the arctangent calculation module 740 should be added to or subtracted from the determined offset value 754, for example as shown in Fig. 7B. The fraction sign module 756 may comprise any suitable hardware or software for determining or otherwise outputting an indication of the fraction sign. In some embodiments, the addition module 752 may use the indication of the faction sign as a control input to control the addition and/or subtraction operations.

[0118] With the nonlinear phase errors (discussed above) corrected via the linearization LUT 750, the linearized fraction can then be added to, or subtracted from the determined offset value (depending on the fraction sign module 756 output) using the addition module 752, to reconstruct the range. In some embodiments, the output range of the phase extraction module may be normalized to [-1, 1). The final phase value can then be generated as shown in Fig. 7E. As a result, the phase extraction module 710 calculates the arctangent function with phase errors less than one least significant bit (“LSB”). Fig. 7F shows the LAA phase errors for 2 ²⁰ possible combinations of 10-bit Re and Im inputs, with respect to the baseline floating-point phases, which can be calculated using an ideal arctangent function.

[0119] For comparison, an FPGA-based design for phase extraction previously used two redundant adders for quadrant identification, while tabulating the non-linear phase error, which can include an additional multi-bit adder for final phase calculation. Compared to the FPGA- based design, the systems and methods described herein employ algorithms and phase error cancellation method that allow a reduction in the number of required arithmetic units, while at the same time achieving last-bit accuracy, reduced size, and low power. The systems and methods described herein have been successfully verified on neurophysiological signals. Referring to Fig. 7G, an example is shown of LAA phase extraction from theta-band oscillations (4 - 8 Hz) in an intracranial EEG (iEEG) signal recorded from a patient with epilepsy.

[0120] In one specific non-limiting example, the proposed LAA architecture was implemented in Verilog HDL, synthesized with Synopsys Design Compiler, and placed and routed using Cadence Innovus in a 65-nm low-power CMOS process. A 10-bit LAA hardware was implemented. The 64-channel input neural signals sampled at 1 kS/s per channel were fed to the LAA module according to the embodiments described herein. The LAA hardware (FIG. 7H) consumed only 162 nW of power at 0.8V supply for 64-channel phase extraction, in a small silicon area of 3,491 pm ² . This LAA implementation is more energy- and area-efficient than conventional FPGA or CORDIC designs and can operate at high speeds (e.g., up to 52.6 MHz in some embodiments) with no latency overhead.

[0121] HARDWARE DESIGN FOR PHASE BASED SYNCHRONY METRICS

[0122] Effective brain stimulation may target and change network synchrony. Depending on the specific disease and circuit, “synchrony” might mean coherence, or phase-based features such as phase-amplitude coupling (“PAC”), phase locking value (“PLV”), amplitude-based features such as amplitude correlations, or a related metric. The model described herein provides systems and methods, such as integrated circuits, for LAA-based phase and amplitude feature extraction (PAC and PLV) following signal conditioning. The proposed designs can efficiently compute the phase metrics of PAC and PLV for use with controlling neural oscillation synchrony between any selected subset of neural channels (e.g., two channels for cross-regional PLV or PAC calculation, one channel for single-region cross-frequency PAC calculation). The designs can be scaled to high-channel-count architectures (e.g., 64 channels or more). Implementations, including circuit implementations, of the PAC and PLV features using the provided LAA architecture and several techniques to improve the energy efficiency are described below. For simplicity of illustration, only two amplifiers are shown in the signal conditioning modules, while the proposed feature extraction circuits can easily extract phase features from a higher number of input channels, e.g., using time-division multiplexing (“TDM”).

[0123] There are various methods to measure phase-amplitude coupling (e.g., modulation index, mean vector length, heights ratio). In some embodiments, the mean vector length (“MVL”) approach may be utilized, in view of its good trade-off between performance and hardware complexity.

[0126] The length of a complex vector z(t) represents the instantaneous amplitude of the signal in the amplitude-modulated frequency band (denoted by f _A ), while the instantaneous phase in the phase-modulating frequency band (denoted by f _P ) is represented by the vector angle.

Strong PAC can cause an asymmetric distribution of vectors (higher amplitude of A _A at certain 6f _p phases), resulting in a non-zero average vector length. PAC and PLV features may be extracted on a window-by-window basis, and N is the number of samples considered in each window. In an exemplary embodiment, if the data rate is IkS/s (1000 Samples/second) and the window size is one second, N is 1000 samples.

[0127] Referring to Fig. 8 A, an exemplary embodiment of PAC extraction system 800 is shown. The PAC extraction system 800 may comprise a signal conditioning module 810 and a PAC determination module 820. The signal conditioning module 810 may comprise systems and/or methods configured to digitize, filter, and determine real (Re) and imaginary (Im components of one or more oscillating input signals. In some embodiments, the input signal (e.g., a neural signal (bipolar or monopolar)) in one or more channels may be initially amplified by an amplifier 702, for example a low noise amplifier (“LNA”). An optional multiplexer (“mux”) 812 may allow selection of input channel. The amplified signal may then be digitized using an ADC 704, and bandpass filtered in two different frequency bands (f _A , fp). The real (Re _p , Re^ _A ) and imaginary Im^ parts of the bandpass filtered signals are then extracted using Hilbert filters. In the illustrated non-limiting example, a single digital finite impulse response (“FIR”) filter with a TDM scheme may be implemented by the filter module 818 to perform both bandpass filtering and Hilbert transform for multi-channel inputs (i.e., PAC features can be extracted from multiple individual channels or multiple pairs of input channels using a single multiplexed hardware). FIR filter coefficients can be retrieved from a memory 814, such as an on-chip memory, and provided to the filter module 818 through a band selecting multiplexer 816.

[0128] The PAC determination module 820 may comprise systems and/or methods configured to determine PAC using the real (Re _p , Re^ _A ) and imaginary (Im^ _p , parts of the filtered signals provided by the signal conditioning module 810. In some embodiments, the PAC determination module 820 may comprise a phase extraction module 710 and a magnitude extraction module 822, which may be used to calculate the instantaneous phase 0f _p and magnitude (also referred to as amplitude) envelope A _A , respectively. The magnitude extraction module 822 may comprise any suitable system or method for calculating or approximating the magnitude of the input value(s). For example, the magnitude extraction module 822 may be configured to perform f “-norm approximation or f ² -norm calculation.

[0129] The sine and cosine of the phase can be read from a trigonometric LUT 824, which may comprise any suitable hardware or software memory or storage structure configured to output trigonometric values based on its input value. The periodicity of the trigonometric functions can be exploited to reduce the trigonometric LUT 824 input range to [0, JT/2). The sine and cosine values may then be multiplied, using a suitable multiplication system or method 826, by the magnitude envelope from the magnitude extraction module 822 and accumulated over a predefined window (N samples) according to Eq. (2). Any suitable system or method may be used to accumulate the values. In some embodiments, a TDM accumulator 828 may be used to accumulate the values and may comprise an addition module coupled with a register array and multiplexer, with the output of the multiplexer used as an input to the addition module. In the illustrated non-limiting example, two TDM accumulators 828 were used in the sine and cosine signal paths. This TDM approach can allow a single feature extraction module to perform multiple feature extractions. Thus, significant hardware savings can be achieved since only the number of registers and multiplexer inputs scale up with the number of features.

[0130] The output of the TDM accumulate^ s) 828 may be right-shifted 830, and the final PAC value may be extracted by magnitude extraction module 832. The right shift performs division by N in Eq. (2), and the amount of shifting depends on the window size N. N may be set to a power of 2 so that a complex divider circuit can be replaced by bit shifting. For example, if N = 1024 (= 2 ¹⁰ ), the output of accumulators is right shifted by 10. PAC extraction according to Eq. (2) requires two amplitude (e.g., Euclidean norm) calculations. In some embodiments, the magnitude extraction modules 822, 832 may be configured to approximate the amplitude using f “-norm: magnitude extraction module 822 approximates Af, and magnitude extraction module 832 approximates the root of squaring of the summations in Eq. (2).

[0131] Referring to Fig. 8B, an exemplary PLV extraction system 850 is shown. The PLV extraction module 850 may be configured to use a mean phase coherence algorithm:

[0133] In the PLV extraction system 850 shown in Fig. 8B, neural signals from two different channels (e.g., two regions of the brain) are amplified, digitized, and bandpass filtered over a selected band fp _LV ) using the signal conditioning module 810. Then, Hilbert filter outputs are fed to the PLV determination module 860. The phase extraction module 710 estimates the instantaneous phase values 0 _CH1 and 0 _CH2 . The cross-channel phase difference A0 may be determined using suitable systems or methods, for example the illustrated register 862 and addition module 864. Next, the sine and cosine of cross-channel phase difference A0 are determined by a trigonometric LUT 824 and accumulated over time using the TDM accumulators 828. The shifters 830 and magnitude extraction module 866 are configured to calculate the PLV feature based on Eq. (3). Shifters 830 may perform a right shifting for division by N as described for the PAC determination module 820, and magnitude extraction module 866 approximates the root of squaring of the summations in Eq. (3).

[0134] In some embodiments, common hardware blocks can be shared between the PAC determination module 820 and PLV determination module 860 to further reduce the power consumption and chip area. Referring to Fig. 8C, an exemplary multi-feature extraction system 880 is shown. The multi-feature extraction system 880 may comprise a unified feature determination module 890, which may comprise shared components of the PLV determination module 860 and PAC determination module 820. Multiplexers 894 may be used and configured to select the appropriate data to output based on the desired function, e.g., PAC or PLV determination (e.g. selection input Fsel = 0 for PAC, Fsel = 1 for PLV). The magnitude extractor 892 may be configured to extract the final PAC or PLV value according to Eq (2) or Eq (3) as described above, using suitable systems or methods.

[0135] A similar generalization can apply to amplitude-amplitude correlation or coupling (“AAC”), calculated within or across frequency bands.

[0137] In the above equation, A _x and A _y denote the instantaneous amplitude/magnitude for two selected channel -band combinations denoted x and j'.

[0138] The outputs of any of these feature extraction systems (PLV, PAC, etc.) can be routed to stimulation control for, e.g., phase-locked stimulation at a chosen band and angle to suppress a neurological symptom. The extracted features may be compared to predefined thresholds, may be fed to a machine-learning processor (classifier) to determine the pathological brain state of the patients to trigger electrical stimulation, and the like.

[0139] As illustrated in the equations above, these connectivity metrics can be defined by Euclidean distance (i.e., •f ² -norm calculations). Moreover, PAC and AAC extraction can include magnitude envelope calculations. These calculations can be complex to implement in hardware due to the use of root sum squared calculations. In some embodiments, the magnitudes for PAC and PLV may be estimated, for example by using a hardware-efficient f “-norm approximation. This further reduces the computational cost and power consumption of various embodiments of the present technology, while precisely tracking PAC and PLV over time. In some embodiments, this may be generalized to the AAC case by modification to the routing of signals.

[0140] By way of example, using a 10-bit model of the proposed unified feature determination module 890 shown in Fig. 8C, both PAC and PLV features for a seizure classification task were extracted, in order to verify the impact of the LAA phase and “-norm approximations. As a baseline for comparison, accurate values of features can be used by employing floating-point arctangent function and f ² -norm operator (Eq. (2) and (3)). While a combination of different feature types (e.g., spectral power, line length) can boost the classification performance, only phase-based features were tested in this task to better examine the impact of the approximations. Fig. 9 summarizes the results and shows that the provided feature approximations cause no significant performance loss.

[0141] This example correlation analysis shows that the provided feature approximations with 10-bit accuracy are statistically identical to the actual features with infinite accuracy. The PAC correlation is relatively lower due to the small amplitudes of high-gamma oscillations and the limited dynamic range of the ADC used in this simulation, but it is sufficient to achieve a reasonable classification accuracy.

[0142] Referring now to Fig. 8D, the unified feature determination module 890 of Fig. 8C was implemented in a 65-nm low-power process. The module was designed to perform 32 feature extractions (PAC, PLV, or combinations of the two). The number of extractions can be scaled up at the cost of a small increase in multiplexing hardware and registers in TDM accumulator 828. Fig. 10 compares the provided LAA-based feature extraction hardware against a conventional CORDIC-based design in terms of area and power consumption.

[0143] The unified feature determination module 890 achieves a notable decrease in area and achieves a ~200x improvement in power consumption. The provided hardware-friendly phase and magnitude approximators allow the unified feature determination module 890 (and alternatively the PAC determination module 820 or PLV determination module 860) to be clocked at a relatively low frequency (e.g., approximately 64 kHz) for 32 feature extractions (1 kS/s per channel), thus enabling a significant saving in the dynamic power consumption without compromising the feature extraction accuracy.

[0144] ASIC DESIGN FOR SYNCHRONY METRICS AND STIMULATION

[0145] The systems and method described herein may be used to determine phase-based metrics of one or more oscillating signals, and to provide an electrical stimulation in accordance with the determined metrics. Referring to Fig. 11, an application specific integrated circuit (“ASIC”) 1100 for measuring one or more input signals and outputting one or more control signals in accordance with the measured input(s) is illustrated. The ASIC 1100 may be configured to provide communication with an external device, for example via wired or wireless interface, such as Bluetooth, NFC, Ethernet, and the like. In some embodiments, the ASIC 1100 may comprise a signal conditioning module 810 (e.g., signal detection module 114 of Fig. 1), a Phase Synchrony Processor 1130 (e.g., processor 108 of Fig. 1), and a stimulator module 1140 (e.g., a signal generation module 114 of Fig. 1). The ASIC 1100 may take as inputs 1104 one or more oscillating signals (e.g., bipolar or monopolar), for example from one or more DBS leads 1102. The ASIC 1100 may provide one or more electrical signals as outputs 1106 (e.g., bipolar or monopolar), for example to one or more DBS leads 1102.

[0146] The input signal(s) may be conditioned by the signal conditioning module 810. The components of the signal conditioning module 810 may be selected to provide good gain matching among channels to allow for cross-regional biomarker extraction. The input signal(s) may be amplified by the amplifier 702. In some embodiments, the amplifier 702 may comprise a closed-loop chopper-stabilized LNA (“chopper LNA”), comprising up- and down-modulation 1108. In some embodiments, the amplifier 702 may comprise an amplifier for each input. For example the ASIC 1100 may comprise a 16-channel input, and the amplifier 702 may comprise 16 closed-loop chopper-stabilized LNAs.

[0147] The output(s) of the chopper LNA 702 may be multiplexed 812 to an integrator 1110. The mux 812 may, for example, comprise a 16: 1 multiplexer. The mux 812 and chopper LNAs 702 may be configured to allow addressing of the LNAs in any user-defined order to allow flexible channel combinations for synchrony extractions. In some embodiments, the integrator 1110 may comprise a Gm-C integrator. The integrator 1110 may provide additional amplification to the output of the chopper LNA 702. The integrator 1110 may be configured to perform lowpass filtering to prevent signal aliasing during sampling in the ADC 704. After amplification and possible integration, the signals are then digitized to any suitable bit width by the ADC 704. In some embodiments, the ADC 704 may comprise a 10-bit SAR ADC.

[0148] The output of the ADC 704 may then be filtered and transformed by the filter module 818 to provide suitable input to the Phase Synchrony Processor 1130 and/or unified feature determination module 890. In some implementations, the processor 108 (see Fig. 1) may comprise the Phase Synchrony Processor 1130 and the filter module 818. Filtering may comprise, for example, decimation (x4 in some embodiments) and bandpass filtering. Transformation may comprise, for example a Hilbert Transform. In some embodiments the signal conditioning module 810 may comprise a programmable threefold FIR filter configured to decimate, bandpass filter, and Hilbert transform the converted input signals 1104 (i.e., from ADC 704). In some embodiments, the threefold FIR filter may further comprise shared hardware, which may help realize chip area reduction.

[0149] The output of the signal conditioning module 810 may be sent to a Phase Synchrony Processor (“PSP”) 1130. The PSP 1130 may comprise suitable hardware and/or software configured to extract (e.g., simultaneously) various neural biomarkers, for example instantaneous phase, amplitude envelope, PLV, PAC, spectral energy (“SE”), and/or the like. In some embodiments, the PSP 1130 may comprise a unified feature determination module 890 configured to perform the various neural biomarker extractions. The PSP 1130 may further comprise a phase-locking detector 1116, which may comprise suitable hardware and/or software configured to select (e.g., via multiplexed s)) and compare biomarkers to predefined thresholds 1114 and/or randomly generated thresholds 1112.

[0150] In some embodiments, the PSP 1130 may further comprise a stimulation control 1120 coupled with the output of the phase-locking detector 1116. The stimulation control 1120 may comprise suitable hardware and/or software configured to provide appropriate control signals to the stimulator module 1140. The stimulator module 1140 may comprise suitable hardware and/or software configured to output an appropriate electric signal on the one or more outputs 1106, for example to stimulate one or more regions of a brain, based on one or more control inputs from the stimulation control 1120.

[0151] Referring to Fig. 12A, an implementation of the ASIC 1100 phase extraction module 710 is illustrated. As previously described, such implementations reduce hardware complexity and overcome the power-accuracy-latency drawbacks of conventional methods. Fig. 12B shows the resulting periodic phase errors of the right-shifted output of the multiplication module, error correction after the linearization LUT (also referred to as “Error LUT”), and range reconstruction. In this implementation, the phase extraction module 710 is configured to provide 10-bit phase outputs normalized to [-1, 1). Fig. 12C shows sub-LSB phase errors at the output of the phase extraction module 710, with respect to the ideal arctangent function. Fig. 12C further shows the oscillatory phase of theta-band LFP measured in-vivo from a Long-Evans rat. For comparison, a last-bit accurate 10-bit unrolled CORDIC was implemented with bit- width optimization and input range reduction, similar to the technology described herein. Fig. 12C shows that the phase extraction module 710 described herein achieves a greater than 30% and 50% improvements in area and power as compared to the CORDIC, respectively. [0152] Referring to Fig. 13 A, an implementation of the ASIC 1100 unified feature determination module 890 is illustrated, according to previously described embodiments. As previously described, the “-norm approximation may be implemented for the amplitude envelope in PAC and PLV, to improve hardware efficiency and avoid use of complex Euclidean norms. Fig. 13B shows results of experimental measurements of cross-regional PLV and PAC taken with an embodiment of the ASIC 1100, which closely track the ideal features (e.g., as provided by mathematical software). The PLV and PAC measurements were based on signals from the infralimbic cortex (IL) and basolateral amygdala (BLA). Referring to Fig. 13B, the top four charts show bandpass filtered neural oscillations in the theta and high gramma frequency bands. The PLV chart on the bottom left shows the degree of phase locking between BLA CHI and IL CHI in the theta band. The PAC chart on the bottom right shows the degree of coupling between the theta phase of BLA CH6 and high-gamma amplitude of IL CH6.

[0153] Referring to Fig. 13C, additional features of the ASIC 1100 phase-locking detector 1116 and stimulation control 1120, which provide flexible stimulation control, are illustrated. In some embodiments, the phase-locking detector may be configured to support various stimulation modes by thresholding the per-sample feature (FSMP, e.g., phase/amplitude at 1kHz), windowed feature (FWIN, e.g. PLV, PAC, and/or SE at l-4Hz), or a combination of the two. The various multiplexers may be control by a window select (SELFWIN), per-sample feature select (SELFSMP), and threshold select (SELTH). In some embodiments, a random threshold generator 1112 may provide random thresholds, which in some embodiments may be use for synchrony disruption to provide various therapeutic effects. In some embodiments, the random threshold generator 1112 may comprise a 10-bit pseudo-random binary sequence threshold generator. In some embodiments, the threshold memory 1114 may comprise any suitable hardware and/or software configured to store predefined thresholds. The stimulation control 1120 may comprise any suitable hardware and/or software configured to provide control signal(s) to the stimulator module 1140.

[0154] According to an exemplary embodiment, the implementation of the PSP 1130 in the ASIC 1100 consumes 9.69 pW (including FIR) at a 0.85V supply for determining 8 PLV/PAC features, achieving a greater than 60.7% savings per feature compared to existing designs.

[0155] Referring to Fig. 14, an implementation of the stimulator module 1140 is illustrated. The stimulator module 1140 may comprise a programmable neurostimulator (e.g., 30-440pA), for example a 4-channel programmable neurostimulator. The stimulator module 1140 may comprise an output driver comprising a stacked H-bridge architecture with active and passive charge balancing (“CB”), and may provide stimulation via the outputs 1106.

[0156] Referring to Figs. 15A-C, measurement results of the ASIC 1100 analog front end (“AFE”), comprising amplifier 702 through ADC 704, and stimulator module 1140 are shown. Referring to Fig. 15 A, a low input-referred noise (“IRN”) of 0.88pVrms (including the ADC 704) was achieved in the l-500Hz band, consuming 2.78pW/channel. Referring to Fig. 15B, the 16-channel gain matching (<0.1% mid-band) and gain programmability (53-61dB) were further demonstrated. Referring to Fig. 15C, for an intentional 50% mismatch in stimulation pulse width, the CB reduces the residual voltage to less than ±4mV through compensation currents and passive discharging.

[0157] Referring back to Figs. 6A-6D, stimulation was targeted at a specific phase (180°) of theta-band LFP (4-8Hz) that is known to correlate with fear- and anxiety-like behavior. Thetaband phase- and PLV-locked stimulation is further demonstrated. Fig. 6D shows 16-channel LFP recording and phase-locked stimulation in two modes (phase-locked stimulation, and phase- locked & PLV-locked stimulation. For example, a predefined per-sample feature threshold (THSMP) was set to 180°, and predefined windowed feature thresholds were set at 0.5 (THWIN, L) and 1 (THWIN, H) (e.g., the predefined therapeutic range in this example being between 0 and 0.5). In the second experiment, stimulation was triggered when both phase locking and PLV locking were detected. For both experiments, the maximum stimulation frequency was set to 6Hz, and the phase-locking detector was controlled such that phase wrapping did not trigger the stimulation.

[0158] Figure 16 shows ASIC 1100 area and power breakdowns and comparison to other state-of-the-art solutions. The exemplary 16-channel ASIC 1100 occupies an area of 2.24mm ² and consumes 60pW. Systems and methods according to embodiments of the present technology allow for integration of phase-locked stimulation while providing various stimulation modes in response to cross-regional phase- and amplitude-based neural biomarkers, which is an improvement over and not found in prior solutions. Systems and methods according to various embodiments of the present technology may be used for, among other things, treating a range of network-based disorders, including depression, anxiety, OCD, and movement disorders. [0159] As appreciated from description above, herein provided systems and methods utilize a novel approach and have a broad range of applications. In some embodiments, the systems and methods described herein provide advantages over conventional methods by providing fast but accurate phase extraction in a small packaging and using a low amount of power, enabling more complex neural biomarker determination and control in an implantable device and providing improved therapeutic benefit. Features suitable for such combinations and sub-combinations of the technology described herein would be readily apparent to persons skilled in the art upon review of the present application as a whole. Persons skilled in the art will recognize that the inclusive/exclusive ranges provided herein, e.g. [-1, 1), may be inclusive or exclusive at either end without significant alterations to the technology described herein. The subject matter described herein and in the recited claims intends to cover and embrace all suitable changes in technology.