Title:
TEST SYSTEM AND TEST METHOD
Document Type and Number:
WIPO Patent Application WO/2022/048274
Kind Code:
A1
Abstract:
A test system and a test method. The test system comprises: a signal providing module configured to provide a first clock signal and a second clock signal for a memory to be tested, wherein the memory to be tested executes a write command on the basis of the first clock signal so that the memory to be tested stores preset data, the memory to be tested executes a read command on the basis of the second clock signal to read the stored data stored in the memory to be tested, and one of the first clock signal and the second clock signal is a symmetric clock signal and the other is an asymmetric clock signal having a preset duty cycle; and a processing module configured to obtain the stored data and to obtain, according to a comparison result between the stored data and the preset data, the clock signal tolerance of the memory to be tested.
More Like This:
| JP2002124096 | SEMICONDUCTOR MEMORY AND ITS TEST METHOD |
| JP4425062 | Semiconductor device |
| JP3190364 | [Title of Invention] Inspection method and circuit |
Inventors:
PAN YIFEI (CN)
Application Number:
PCT/CN2021/103029
Publication Date:
March 10, 2022
Filing Date:
June 29, 2021
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C29/02
Foreign References:
| US20080031055A1 | 2008-02-07 | |||
| US20050135167A1 | 2005-06-23 | |||
| CN111597125A | 2020-08-28 | |||
| CN106409343A | 2017-02-15 | |||
| CN101299203A | 2008-11-05 |
Attorney, Agent or Firm:
BOXIN CHINA INTELLECTUAL PROPERTY (CN)
Download PDF: