KETEN UMUT (TR)
US20120079310A1 | 2012-03-29 | |||
US7606541B1 | 2009-10-20 | |||
US20160269170A1 | 2016-09-15 | |||
EP3242423A1 | 2017-11-08 | |||
US20170302392A1 | 2017-10-19 |
L. GASPARINI ; O. ZADEDYURINA ; G. FONTANA ; D. MACII ; A. BONI ; Y. OFEK: "A Digital Circuit for Jitter Reduction of GPS-disciplined 1-pps Synchronization Signals", ADVANCED METHODS FOR UNCERTAINTY ESTIMATION IN MEASUREMENT, 2007 IEEE INTERNATIONAL WORKSHOP ON, IEEE, PI, 1 July 2007 (2007-07-01), Pi, pages 84 - 88, XP031152246, ISBN: 978-1-4244-0932-7
See also references of EP 4005118A4
CLAIMS 1. A method providing phase and frequency synchronization in IP/MPLS network, characterized in comprising process steps of switching PPS signal by means of DTM protocol, transmission of PPS signal to other end of network through a virtual circuit (300), switching the transmitted PPS signal again by means of DTM protocol, conversion of PPS signal arriving at other end to ToD and PTP data and transmission thereof to terminal component (400). 2. A method providing phase and frequency synchronization according to claim 1 , characterized in comprising process step of conversion of ToD (time of day) and PTP data received from atomic clock (100) in order to obtain PPS signal. 3. A system providing phase and frequency synchronization in IP/MPLS network, characterized in comprising a transmitter mechanism (210) switching PPS signal at one end of network via DTM protocol, a receiver mechanism (220) transmitting PPS signal to terminal component (400) by switching PPS signal via DTM protocol and converting into ToD and PTP data on other end of network, and a virtual circuit (300) providing carriage of PPS signal from one end to the other. 4. A system providing phase and frequency synchronization according to claim 3, characterized in comprising an atomic clock (100) giving ToD (time of day) output and said transmitter mechanism (210) converting ToD and PTP data received from said atomic clock (100) into PPS signal. 5. A system providing phase and frequency synchronization according to claim 4, characterized in that said transmitter mechanism (210) comprises a primary converter device (21 1 ) converting ToD and PTP data into PPS signal and a primary switching device (212) conducting switching of PPS signal by DTM protocol. 6. A system providing phase and frequency synchronization according to one of the claims 3 to 5, characterized in that said receiver mechanism (220) comprises a secondary switching device (222) switching PPS signal by DTM protocol and a secondary converter device (221 ) converting PPS signal into ToD and PTP data and transmitting to terminal component (400). |
Technical Field
Invention and Method relates to transfering of phase and frequency synchronization independent from signals received from satellites over traditional core carrier IP/MPLS networks.
Invention particularly relates to a phase and frequency synchronization transfer method based on conversion of the time information received from an atomic clock source as PPS or PPS plus string (Pulse Per Second) and then the transport of the time information to an far opposite end with the use of a point to point Virtual Circuit DTM (Dynamic Synchronous Transfer Mode) Protocol created over traditional core carrier IP/MPLS network.
Present State of the Art
A major part of current technological demands is meeting the required phase and frequency demands. Digital networks based on time division duplex (TDD) and C-RAN and in the future other also techniques require phase and frequency synchronisation. "Phase and frequency synchronization” meaning Phase synchronisation is usually applied to two waveforms of the same frequency with identical phase angles with each cycle. Frequency synchronization is a process that adjusts the relative frequency of one or more signals based on the frequency reference of another signal. "Phase and frequency synchronization” is a key factor in providing proper 5G and beyond technologies. [1] [2] [3]
Phase and frequency synchronization in the related art standardization is performed by ITU- T (1588) and IEEE G8275.1 (Full Timing Support) and IEEE G8275.2 (Partial Timing Support) standards. Said standards are dependent on GPS/GNSS signal received via satellite as main source and these standards only define a mediocre network based solution. An external dependence occurs for phase and frequency synchronization as satellites providing GPS/GNSS signals are for most countries completely foreign and some are managed militarily. In addition, a satellite signal is weak ~ -160dBm and/or when there are adverse weather conditions, when jammers are used, synchronization can also fail easily. (Generally used in military exercises)
The related art as suggested by these IEEE and ITU-T standards are standby measures in case of synchronization failures by GPS/GNSS. To cope with these standards as advised by IEEE and ITU-T, high level of investment and operation costs are required for application of said standby measures protocols.[4] Despite these investments, experiencing inefficiencies due to characteristics of core networks indicates that such standby measures are not fully safe. GPS/GNSS requires a failover system however the failover system must be robust as well, the IEEE and ITU-T determined standard is also not robust thus another semi-safe system as standby for a semi-safe system fails to meet requirements for particularly critical networks, and unsafe conditions are seen widely in literature. [5] [6] [7] [8]
As a result, due to above-described disadvantages and inadequacy of existing solutions, it has been necessary to make development in the related art.
Purpose of the Invention
The invention has been developed with inspiration from existing situations and aims to eliminate the above-mentioned disadvantages.
Primary purpose of the invention is to transmit phase and frequency synchronization in a DTM layer operating over a IP/MPLS network instead of transferring phase and frequency synchronization in current IP/MPLS networks by the use of PTP (IEEE 1588) and defined by ITU-T 8275.x.
Another purpose of the invention is to provide phase and frequency synchronization without causing any additional investment and operating cost for existing networks.
In order to achieve above described purposes, the invention is a new method to provide phase and frequency synchronization in IP/MPLS network without need for ITU-T G8275.1 (Full Timing Support) and IEEE G8275.2 (Partial Timing Support) standards and without any investment for applying such standards and the method comprises process steps of switching of PPS/PPS Plus string signal by means of DTM protocol, transmission of PPS/PPS Plus string signal to other end of network through a virtual circuit, switching the transmitted PPS/PPS Plus string signal again by means of DTM protocol, conversion of PPS/PPS Plus string signal arriving at other end to ToD and PTP data and transmission there of to the terminating component.
The system where above mentioned method is used comprises; a clock time that gives ToD (time of day) output, PPS/PPS Plus string and or PTP or ToD output; a transmitter mechanism converting ToD and PTP data into PPS/PPS Plus string signal on one end of network and then switching by DTM protocol; a receiver mechanism transmitting PPS/PPS Plus string signal to terminal component by switching PPS/PPS Plus string signal by DTM protocol and by converting into ToD and PTP data on other end of network; and a virtual circuit providing carriage of PPS signal from one end to the other. The structural and characteristics features of the invention and all advantages will be understood better in detailed descriptions with the figures given below and with reference to the figures, and therefore, the assessment should be made taking into account the said figures and detailed explanations.
Brief Description of the Drawings
Figure 1 is a schematic view of an embodiment of the system providing phase and frequency synchronization of the invention.
Figure 2 is a schematic view of another embodiment of the system providing phase and frequency synchronization of the invention.
Figure 3 is a view of test results of the system providing phase and frequency synchronization of the invention.
Description of Part References
100. Atomic clock
210. Transmitter mechanism
21 1. Primary converter device
212. Primary switching device
220. Receiver mechanism
221. Secondary converter device
222. Secondary switching device
300. Virtual circuit
400. Terminal component
Detailed Description of the Invention
In this detailed description, the preferred embodiments of a method and system providing phase and frequency synchronization disclosed under the invention have been disclosed solely for the purpose of better understanding of the subject.
The method disclosed hereunder is basically about transmission of ToD (time of day) and/or PTP protocol data or PPS signal received from atomic clock (100) to the terminal component (400) located in receiver part. ToD and PTP data are converted into PPS during said transmission process and carried through virtual circuit (300). Switching operation is performed by DTM protocol during said process.
Process steps of method disclosed under the invention are described briefly below: • switching PPS/PPS Plus string signal through DTM protocol,
• carriage of PPS/PPS Plus string signal to other end of network via a virtual circuit (300),
• switching transmitted PPS/PPS Plus string signal again through DTM protocol,
• transmitting of PPS/PPS Plus string signal received at other end to terminal component (400) by being convert into ToD (time of day) and/or PTP data.
In the method disclosed hereunder, PPS signal can be received from an atomic clock (100) which gives output in this way, PPS signal as well as obtained by means of converting ToD and PTP data received from an atomic clock (100) which gives ToD (time of day) output into PPS/PPS Plus string signal.
Figure 1 is a schematic view of an embodiment of the system providing phase and frequency synchronization of the invention. The atomic clock (100) shown here receives ToD (time of day) and can output PTP as described by IEEE (1588v2). The PTP data received from it is firstly converted into PPS/PPS plus string signal by means of a PCB (printed circuit board) designed for this (210) and the converted signal is switched via DTM protocol. PPS signal is carried to other end of network by help of a DTM virtual circuit (300). PPS signal delivered to other end of the network by the DTM virtual circuit (300) is firstly switched at DTM protocol by help of a received mechanism (220) therein and then converted into PTP data by means of a PCB (printed circuit board) designed for this containing the Phase and Frequency Synchronisation and additional ToD. The converted data are thus delivered to terminal component (400) which is the last component on the receiver part.
In addition to this embodiment, an atomic clock (100) giving PPS/PPS plus string output can be used in the system. In such embodiment, the transmitter mechanism (210) only performs switching of PPS signal that received by transmitter mechanism (210).
Figure 2 is a schematic view of another embodiment of the system providing phase and frequency synchronization of the invention. In said embodiment, differently from the embodiment shown in Figure 1 , conversions of PTP-PSP and switching at DTM protocol are made by separate devices instead of an internal PCB (printed circuit board) addition designed for this. In this embodiment, the transmitter mechanism (210) in initial part of the system comprises a primary converter device (21 1 ) converting ToD and PTP data into PPS signal and a primary switching device (212) switching PPS signal by DTM protocol. In this embodiment, similarly, said receiver mechanism (220) provided in other part of the system comprises a secondary switching device (222) switching PPS signal by DTM protocol and a secondary converter device (221 ) converting PPS signal into ToD and PTH data and transmitting to terminal component (400). As seen, in the system disclosed under the invention, operations of PTP - PPS conversion and switching by DTM protocol can be performed by an integrated single device as well as each operation can also be made by separate devices.
Figure 3 is a view of test results of the system providing phase and frequency synchronization of the invention. As seen, at least 10 times more efficiency is gained in comparison to systems available in the related art.
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