Title:
TRANSISTOR
Document Type and Number:
WIPO Patent Application WO/2023/037795
Kind Code:
A1
Abstract:
This transistor comprises: an amorphous substrate; a conductive alignment layer on the amorphous substrate; a heterojunction structure including a semiconductor layer which is on the conductive alignment layer and a polarization layer which contacts the semiconductor layer; and a gate electrode on the heterojunction structure. The heterojunction structure includes a depression in a region overlapping with the gate electrode. The depression may be provided to the polarization layer, and may be provided to the semiconductor layer.
Inventors:
KINJO HIROUMI (JP)
NISHIMURA MASUMI (JP)
AOKI HAYATA (JP)
NISHIMURA MASUMI (JP)
AOKI HAYATA (JP)
Application Number:
PCT/JP2022/029663
Publication Date:
March 16, 2023
Filing Date:
August 02, 2022
Export Citation:
Assignee:
JAPAN DISPLAY INC (JP)
International Classes:
H01L29/778; H01L21/205; H01L21/336; H01L21/337; H01L21/338; H01L21/363; H01L29/78; H01L29/786; H01L29/808; H01L29/812
Foreign References:
| JP2013033918A | 2013-02-14 | |||
| JP2015179786A | 2015-10-08 | |||
| US20210202698A1 | 2021-07-01 | |||
| JP2011009268A | 2011-01-13 | |||
| US20170047223A1 | 2017-02-16 |
Other References:
WATABIKI KOSUKE, HIROSHI KOBAYASHI, MIO OHTA, KOHEI UENO, ATSUSHI KOBAYASHI, HIROSHI FUJIOKA: "17a-503-2: Fabrication of AlGaN/GaN HEMT structures on amorphous substrates with graphene buffer layers", THE JAPAN SOCIETY OF APPLIED PHYSICS ANNUAL CONFERENCE LECTURE PROCEEDINGS; 2017/03/14 - 2017/03/17, JAPAN SOCIETY OF APPLIED PHYSICS, JP, vol. 4, 1 March 2017 (2017-03-01) - 17 March 2017 (2017-03-17), JP, pages 13 - 13-251, XP093046240, DOI: 10.11470/jsapmeeting.2017.1.0_3448
Attorney, Agent or Firm:
TAKAHASHI, HAYASHI AND PARTNER PATENT ATTORNEYS, INC. (JP)
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