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Title:
WAFER CARRIER FOR SEMICONDUCTOR PROCESSING
Document Type and Number:
WIPO Patent Application WO/2021/081027
Kind Code:
A1
Abstract:
A substrate carrier is shown and described herein. The substrate carrier includes opposing surfaces that can each support one or more substrates to be processed via a coating deposition method. The surface of the substrate that is employed to support a substrate during a deposition process can be alternated such that each side of the substrate carrier receives similar amounts of deposition material and that the stresses resulting from such fugitive deposits can be offset allowing for reduced stress to the carrier and increased life span of the substrate carrier.

Inventors:
SCHMIDT-SANE PETER (US)
FAN WEI (US)
Application Number:
PCT/US2020/056566
Publication Date:
April 29, 2021
Filing Date:
October 21, 2020
Export Citation:
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Assignee:
MOMENTIVE PERFORMANCE MAT QUARTZ INC (US)
International Classes:
C23C14/50; H01L21/687; C23C16/458
Foreign References:
JP2013168410A2013-08-29
JPS5654033A1981-05-13
TW201225208A2012-06-16
US201962923702P2019-10-21
US20020182394A12002-12-05
Attorney, Agent or Firm:
SLABY, Scott M. (US)
Download PDF:
Claims:
CLAIMS

What is claimed is:

1. A semiconductor substrate carrier comprising a substrate body having (i) a first surface with one or more substrate holders disposed in the first surface, and (ii) a second surface opposite the first surface with one or more substrate holders disposed in the second surface.

2. The semiconductor substrate carrier of claim 1, wherein the one or more substrate holders disposed in the first surface are disposed in a first pattern, the one or more substrate holders disposed in the second surface are disposed in a second pattern, and the second pattern is a mirror image of the first pattern.

3. The semiconductor substrate carrier of claim 1, wherein the one or more substrate holders disposed in the first surface are provided in a first pattern, and the one or more substrate holders disposed in the second surface are provided in a second pattern identical to the first pattern, and the substrate holders of the second pattern are offset relative to a corresponding substrate holder in the first pattern.

4. The semiconductor substrate carrier of any of claims 1-3, wherein (i) the one or more substrate holders in the first surface are each defined by a recessed area relative to the first the recessed areas having a lower surface and a wall, and (ii) the one or more substrate holders in the second surface are defined by a recessed area relative to the second surface, the recessed areas each having a lower surface and a wall.

5. The semiconductor substrate carrier of claim 4, wherein the walls of each of the recesses independently have an angle of 90° to about 175° relative to the lower surface.

6. The semiconductor substrate carrier of claim 4, wherein the walls of each of the recesses independently have an angle of 90° to about 150° relative to the lower surface.

7. The semiconductor substrate carrier of claim 4, wherein the walls of each of the recesses independently have an angle of 90° to about 135° relative to the lower surface.

8. The semiconductor substrate carrier of claim 4, wherein the walls of each of the recesses independently have an angle of 90° to about 120° relative to the lower surface.

9. The semiconductor substrate carrier of claim 4, wherein the walls of each of the recesses independently have an angle of 90° relative to the lower surface.

10. The semiconductor carrier of claim 4, wherein one or more of the walls of the recesses independently have an angle of less than 90° relative to the lower surface.

11. The semiconductor substrate of any of claims 1-10, wherein the semiconductor substrate is formed from a graphite, silicon, silicon nitride, silicon carbide, quartz, stainless steel, molybdenum, aluminum, aluminum oxide, aluminum nitride, or a combination of two or more thereof..

12. The semiconductor substrate of claim 11, wherein the substrate comprises a coating selected from silicon carbide, silicon nitride, pyrolytic graphite, pyrolytic carbon, pyrolytic boron nitride, diamond, aluminum nitride, aluminum oxide, silicon dioxide, tantalum carbide, niobium carbide, zirconium carbide, hafnium carbide, or a combination of two or more thereof.

13. The semiconductor substrate of claim 11, wherein the semiconductor substrate is graphite, and the substrate is coated with a metal carbide coating comprising tantalum carbide.

14. A method of forming a film on a semiconductor substrate comprising:

(i) providing a semiconductor substrate carrier of any of claims 1-13;

(ii) providing one or more substrates to be coated to the one or more substrate holders disposed in the first surface of the substrate carrier;

(iii) subjecting the one or more substrates to a deposition process;

(iv) removing the one or more substrates from the first surface of the substrate carrier;

(v) providing one or more substrates to be coated to the one or more substrate holders disposed in the second surface of the substrate carrier; and

(vi) subjecting the one or more substrates in (v) to a deposition process; (vii) removing the one or more substrates from the second surface of the substrate carrier; and

(viii) subsequently repeating steps (ii)-(iv).

15. The method of claim 14, wherein the deposition process is chosen from chemical vapor deposition or physical vapor deposition.

16. The method of claims 14 or 15, wherein the deposited film introduces a stress to the substrate carrier.

17. The method of claim 16, wherein the deposited film has a first coefficient of thermal expansion and the substrate carrier has a second coefficient of thermal expansion, and the first and second coefficients of thermal expansion are different from one another.

18. The method of any of claims 14-17 comprising repeating steps (ii)-(vii) for two or more cycles.

19. The method of any of claims 14-17 comprising repeating steps (ii)-(iv) for two or more cycles prior to performing steps (v)-(vii).

20. The method of claim 19 comprising performing steps (v)-(vii) for two or more cycles and subsequently repeating steps (ii)-(iv).

21. The method of claim 20, wherein steps (v)-(vii) are repeated as the same number of cycles as steps (ii)-(iv).

22. The method of any of claims 14-17 wherein steps (ii)-(iv) are repeated until a first selected deposition thickness is achieved on the first surface of the substrate carrier, and then steps (v)-(vii) are conducted.

23. The method of claim 22, wherein steps (v)-(vii) are repeated until a second selected deposition thickness is achieved and then returning to steps (ii)-(iv).

24. The method of any of claims 14-23, wherein a plug is disposed in each of the substrate holders in the second surface when steps (ii)-(iv) are being performed, and a plug is disposed in each of the substrate holders in the first surface when steps (v)-(vii) are being performed.

Description:
WAFER CARRIER FOR SEMICONDUCTOR PROCESSING

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application claims priority to and the benefit of U.S. Provisional

Patent Application 62/923,702, titled “WAFER CARRIER FOR SEMICONDUCTOR PROCESSING,” filed on October 21, 2019, the entire disclosure of which is incorporated by reference herein in its entirety.

FIELD OF INVENTION

[0002] The present invention relates to a wafer carrier for supporting one or more semiconductor wafers during processing of such wafers to apply a coating or film to the wafers, and to processes and applications employing such wafer carriers.

BACKGROUND

[0003] Wafer handling apparatuses, e.g., wafer carriers, substrate holders, susceptors, heaters, and electrostatic chucks, are used in a number of system applications such as chemical vapor deposition (CVD) and physical vapor deposition (PVD) for in the growth of thin film materials, etc. Heaters are typically used to heat a semiconductor wafer in the manufacture of semiconductors. A wafer handling assembly may include a susceptor for supporting a wafer, and a plurality of heaters disposed under the susceptor to heat the wafer. The semiconductor wafer is heated within a confined environment in a processing vessel at relatively high temperature and often in an atmosphere that is highly corrosive.

[0004] One of the primary steps in fabricating modem semiconductor devices is forming various layers, including dielectric layers and/or metal layers, on a semiconductor substrate, e.g., a semiconductor wafer. As is well known, these layers can be deposited by CVD)or PVD. In a conventional thermal CVD process, reactive gases are supplied to the substrate surface where heat-induced chemical reactions (homogeneous or heterogeneous) take place to produce a desired film. The substrate is held on a substrate holder, in an exemplary PVD system, and a target (a plate of the material that is to be deposited) is connected to a negative voltage supply (direct current (DC) or radio frequency (RF)) while a substrate holder facing the target is either grounded, floating, biased, heated, cooled, or some combination thereof. A gas, such as argon, is introduced into the PVD system, typically maintained at a pressure between a few millitorr (mtorr) and about 100 mtorr, to provide a medium in which a glow discharge can be initiated and maintained. When the glow discharge is started, positive ions strike the target, and target atoms are removed by momentum transfer. These target atoms subsequently condense into a thin film on the substrate, which is on the substrate holder and connected to a heating mechanism that indirectly heats the substrate.

[0005] The semiconductor substrate is supported by a substrate carrier during the film deposition process. The substrate carrier may contain one or more recessed areas to receive and hold the semiconductor substrate in position during processing. The substrate carrier (which may be referred to as the wafer carrier) is often made from a graphite material that may optionally be coated with a ceramic material. During thin film deposition, the semiconductor substrate is coated with a desired material (e.g., SiC), and a fugitive coating accumulates on the substrate carrier in areas outside of the substrate being coated and the recessed areas. The fugitive coatings can introduce a stress to the carrier after cooling that results in deformation of the carrier. The stress may be due to the differences in the coefficient of thermal expansion between the substrate carrier material and the coating being applied to the semiconductor substrate and the wafer carrier. The stress can cause the carrier to deform such that it acquires a convex, concave or more complex shape depending on the direction of the stress.

[0006] Carriers may be used in multiple film deposition runs. As a carrier is exposed to multiple film depositions , the fugitive coating on the carrier surface accumulates over time, which induces greater stress and increases deformation of the carrier. Deformation can become so large that the carrier cannot suitably hold the semiconductor substrate in position and/or coating uniformity of the substrate cannot be maintained.

[0007] Figures 1-2 illustrate deformation of a conventional substrate carrier. The carrier 10 is a graphite carrier body coated with tantalum carbide (TaC). The carrier includes substrate holders 12a, 12b, and 12c. The carrier in figure 1 is used to coat substrates with silicon carbide (SiC). Figure 1 shows the carrier after a deposition/coating trial and after the coated substrates have been removed. The darker area on the surface 14 of the carrier 10 is the fugitive silicon carbide coating received by the substrate carrier during coating of a substrate material. The lighter colored areas of holders 12a, 12b and 12c is from the tantalum carbide coating on the graphite body. These areas do not receive the fugitive coating from the deposition process as they are holding (and covered by) the substrate(s) that are subjected to the film deposition process.

[0008] Various techniques have been used to reduce deformation or bowing of the wafer carrier. U.S. Publication 2002/182394 employed dopants during the process to create selectively delaminated layers throughout the process. Still other attempts have included looking at graphite grades with different CTE values to mitigate the deformation of tantalum carbide carriers used in the silicon carbide epitaxy process. Even reducing the CTE of the graphite, the carriers exhibited significant deformation.

[0009] Thus, a suitable solution to this issue has still not been found.

SUMMARY

[0010] The following presents a summary of this disclosure to provide a basic understanding of some aspects. This summary is intended to neither identify key or critical elements nor define any limitations of embodiments or claims. Furthermore, this summary may provide a simplified overview of some aspects that may be described in greater detail in other portions of this disclosure.

[0011] In one aspect, provided is a substrate carrier such as for a semiconductor wafer suitable for use in treatment and processing of a semiconductor wafer. The substrate carrier is configured such that the residual stress that can result from exposure to a vapor deposition process is reduced or offset to allow for the substrate carrier to increase the life span of the substrate carrier.

[0012] In one aspect, provided is a substrate carrier comprising a substrate body having

(i) a first surface with one or more substrate holders disposed in the first surface, and (ii) a second surface opposite the first surface with one or more substrate holders disposed in the second surface. Having substrate holders in opposing surfaces of the substrate carrier allows both sides of the carrier to be employed for processing operations. The substrate carrier can be flipped after a selected number of processing operations such that fugitive coatings from the process do not build up only one side of the carrier. By allowing both sides of the carrier to be used in successive (or a select number) of processing operations, the stress resulting from the buildup of the fugitive coating can be offset or diminished.

[0013] In one aspect, provided is a semiconductor substrate carrier comprising a substrate body having (i) a first surface with one or more substrate holders disposed in the first surface, and (ii) a second surface opposite the first surface with one or more substrate holders disposed in the second surface. [0014] In one embodiment, the one or more substrate holders disposed in the first surface are disposed in a first pattern, the one or more substrate holders disposed in the second surface are disposed in a second pattern, and the second pattern is a mirror image of the first pattern.

[0015] In one embodiment, the one or more substrate holders disposed in the first surface are provided in a first pattern, and the one or more substrate holders disposed in the second surface are provided in a second pattern identical to the first pattern, and the substrate holders of the second pattern are offset relative to a corresponding substrate holder in the first pattern.

[0016] In one embodiment of the semiconductor substrate carrier of any of the previous embodiments, (i) the one or more substrate holders in the first surface are each defined by a recessed area relative to the first the recessed areas having a lower surface and a wall, and (ii) the one or more substrate holders in the second surface are defined by a recessed area relative to the second surface, the recessed areas each having a lower surface and a wall.

[0017] In one embodiment, the walls of each of the recesses independently have an angle of 90° to about 175° relative to the lower surface. In oneembodiment, the walls of each of the recesses independently have an angle of 90° to about 150° relative to the lower surface. In one embodiment, the walls of each of the recesses independently have an angle of 90° to about 135° relative to the lower surface. In one embodiment, the walls of each of the recesses independently have an angle of 90° to about 120° relative to the lower surface. In one embodiment, the walls of each of the recesses independently have an angle of 90° relative to the lower surface.

[0018] In one embodiment, one or more of the walls of the recesses independently have an angle of less than 90° relative to the lower surface

[0019] In one embodiment of the semiconductor substrate carrier of any of the previous embodiments, wherein the semiconductor substrate is formed from a graphite, silicon, silicon nitride, silicon carbide, quartz, stainless steel, molybdenum, aluminum, aluminum oxide, aluminum nitride, or a combination of two or more thereof.

[0020] In one embodiment, the substrate comprises a coating selected from silicon carbide, silicon nitride, pyrolytic graphite, pyrolytic carbon, pyrolytic boron nitride, diamond, aluminum nitride, aluminum oxide, silicon dioxide, tantalum carbide, niobium carbide, zirconium carbide, hafnium carbide, or a combination of two or more thereof.

[0021] In one embodiment, the semiconductor substrate is graphite, and the substrate is coated with a metal carbide coating comprising tantalum carbide. [0022] In one aspect, provided is a method of forming a film on a semiconductor substrate comprising:

(i) providing a semiconductor substrate carrier of any of claims 1-7;

(ii) providing one or more substrates to be coated to the one or more substrate holders disposed in the first surface of the substrate carrier;

(iii) subjecting the one or more substrates to a deposition process;

(iv) removing the one or more substrates from the first surface of the substrate carrier;

(v) providing one or more substrates to be coated to the one or more substrate holders disposed in the second surface of the substrate carrier; and

(vi) subjecting the one or more substrates in (v) to a deposition process;

(vii) removing the one or more substrates from the second surface of the substrate carrier; and (viii) subsequently repeating steps (ii)-(iv).

[0023] In one embodiment of the method, the deposition process is chosen from chemical vapor deposition or physical vapor deposition.

[0024] In one embodiment of the method, the deposited film introduces a stress to the substrate carrier.

[0025] In one embodiment of the method, the deposited film has a first coefficient of thermal expansion and the substrate carrier has a second coefficient of thermal expansion, and the first and second coefficients of thermal expansion are different from one another.

[0026] In one embodiment, the method of any previous embodiment comprises repeating steps (ii)-(vii) for two or more cycles.

[0027] In one embodiment, the method of any previous embodiment comprises repeating steps (ii)-(iv) for two or more cycles prior to performing steps (v)-(vii).

[0028] In one embodiment, the method of any previous embodiment comprises performing steps (v)-(vii) for two or more cycles and subsequently repeating steps (ii)-(iv). In one embodiment, steps (v)-(vii) are repeated as the same number of cycles as steps (ii)-(iv). [0029] In one embodiment, the method of any previous embodiment comprises repeating steps (ii)-(iv) until a first selected deposition thickness is achieved on the first surface of the substrate carrier, and then steps (v)-(vii) are conducted.

[0030] In one embodiment, the method of any previous embodiment comprise reeating steps (v)-(vii) until a second selected deposition thickness is achieved and then returning to steps (ii)-(iv).

[0031] In one embodiment, the method of any previous embodiment comprises providing a plug disposed in each of the substrate holders in the second surface when steps (ii)- (iv) are being performed, and providing a plug disposed in each of the substrate holders in the first surface when steps (v)-(vii) are being performed.

[0032] The following description and the drawings disclose various illustrative aspects.

Some improvements and novel aspects may be expressly identified, while others may be apparent from the description and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS [0033] The accompanying drawings illustrate various systems, apparatuses, devices and related methods, in which like reference characters refer to like parts throughout, and in which:

[0034] Figure 1 is a photograph showing a conventional substrate carrier that exhibits deformation;

[0035] Figure 2 is a back surface profile (opposite to the wafer holder surface) of the substrate carrier of Figure 1;

[0036] Figure 3 is a perspective view of a substrate carrier in accordance with an embodiment of the invention;

[0037] Figure 4 is a top view of the substrate carrier of Figure 4;

[0038] Figure 5 is a bottom view of the substrate of Figure 4;

[0039] Figure 6 is a cross-sectional view of the substrate of Figures 4-6 taken along the line 7-7;

[0040] Figure 6a is view of a portion of the substrate of Figure 6;

[0041] Figure 6b is a view of a portion of the substrate of Figure 6 showing an alternate embodiment of the substrate holder;

[0042] Figure 7 is a top view of a substrate carrier in accordance with another embodiment of the invention; and

[0043] Figure 8 is a side view of a substrate carrier as shown in Figure 4-7 in a coating application system.

DETAILED DESCRIPTION

[0044] Reference will now be made to exemplary embodiments, examples of which are illustrated in the accompanying drawings. It is to be understood that other embodiments may be utilized and structural and functional changes may be made. Moreover, features of the various embodiments may be combined or altered. As such, the following description is presented by way of illustration only and should not limit in any way the various alternatives and modifications that may be made to the illustrated embodiments. In this disclosure, numerous specific details provide a thorough understanding of the subj ect disclosure. It should be understood that aspects of this disclosure may be practiced with other embodiments not necessarily including all aspects described herein, etc.

[0045] As used herein, the words “example” and “exemplary” means an instance, or illustration. The words “example” or “exemplary” do not indicate a key or preferred aspect or embodiment. The word “or” is intended to be inclusive rather than exclusive, unless context suggests otherwise. As an example, the phrase “A employs B or C,” includes any inclusive permutation (e.g., A employs B; A employs C; or A employs both B and C). As another matter, the articles “a” and “an” are generally intended to mean “one or more” unless context suggest otherwise.

[0046] In accordance with aspects and embodiments of the invention, provided is a semiconductor substrate carrier suitable for use in semiconductor substrate processing such as, for example, application of coatings or films to a semiconductor substrate. The substrate carrier includes a surface profile on a first side that can support one or more substrates, and a surface profile on a second side (opposite the first side) that can support one or more substrates. The present substrate carriers can support a substrate on each surface of the carrier and can be flipped after a selected number of coating/deposition applications and used in a successive coating application process. By allowing for use of both sides of the carrier, the residual stress build up can be balanced as the fugitive coating that results from the film deposition process can be offset or provided in more equal amounts as compared to a standard single sided carrier. [0047] Figures 3-6 show an embodiment of a substrate carrier in accordance with one aspect and embodiment of the invention. Figures 4-7 show a substrate carrier 100 having an upper surface 110 and a lower surface 120 opposite the upper surface. The upper surface includes substrate holders 130a, 130b, and 130c suitable for holding a substrate such as, for example, a semiconductor wafer. The lower surface 120 includes holders 140a, 140b, and 140c suitable for holding a substrate. The substrate holders 130a- 130c and 140a- 140c may be formed as recessed areas in the respective surfaces 110 and 120 of the substrate carrier.

[0048] The recessed areas are defined by a lower surface recessed relative to the surface of the substrate carrier and a side wall or walls depending on the shape of the substrate holder. It will be appreciated that the shape of the substrate holder is not particularly limited and can be selected as desired for a particular purpose or intended application. In one embodiment, the substrate holders have a perimeter defining a circle, oval, square, rectangle, diamond, trapezoid, pentagon, hexagon, octagon, etc. It will be appreciated that circular and oval shapes will comprise a continuous side wall, while non-circular or non-oval shapes will be defined with a plurality of side walls necessary to provide the desired shape. The depths of the recesses defining the substrate holders is not particularly limited and can be selected as desired for a particular purpose or intended application.

[0049] The wall or walls forming the recess can also be configured as desired for a particular purpose. In one embodiment, the wall or walls are substantially vertical (e.g., at a 90° angle relative to the lower surface of the substrate holder). Alternatively, the sidewalls can be chamfered or angled relative to the lower surface. Figure 6a shows a cross-section of the substrate holder 110 highlighting substrate holder 130c. In Figure 6a, the substrate holder 130c has a lower surface 132c and side wall 134c (as the substrate holder has a circular perimeter). The wall 134c is substantially vertical and is at 90° relative to the lower surface 132c. Figure 6b shows an alternate embodiment with a substrate holder 130c’ having a lower surface 132c’ and a wall 134c’ where the wall 134c’ is chamfered and has an angle Q that is greater than 90° relative to the lower surface 132.

The angle Q between the side wall and the lower surface of the recessed area forming the substrate holder can be selected as desired. In on embodiment, the walls of the recesses independently have an angle of about 30° to about 175° relative to the lower surface. In one embodiment, the walls of the recesses independently have an angle of 90° to about 175° relative to the lower surface, about 100° to about 150° relative to the lower surface, about 105° to about 135° relative to the lower surface, or about 100° to about 120° relative to the lower surface. It will be appreciated that the angle can be less than 90°. In embodiments the angle is about 85°, about 80°, or about 75° relative to the lower surface. Here as elsewhere in the specification and claims, numerical values can be combined to form new and non-specified ranges. In one embodiment, the walls of each of the recesses independently have an angle of 90° relative to the lower surface.

[0050] As shown in Figures 3-6, the substrate holders 140a, 140b, and 140c on the lower surface 120 are mirrors to the substrate holders 130a, 130b, and 130c on the upper surface 110. Without being bound to any particular theory, having opposing substrate holders in a mirrored relationship may create a more balanced offset in stress to the substrate carrier. [0051] It will be appreciated, however, that it is not necessary for the substrate holders on opposing surfaces of the substrate carrier to be mirror images to one another. Figure 8 shows an embodiment of a substrate carrier 200 having a top surface 210 and an opposing lower surface 220 (Surface 220 is not drawn in Figure 8. The upper surface 210 includes substrate holders 230a, 230b, and 230c. The lower surface includes substrate holders 240a, 240b, and 240c. The substrate holders 240a, 240b, and 240c are in the same pattern as substrate holders 230a, 230b, and 230c but the patern of substrate holders 240a-240c in the lower surface is axially rotated relative to the patern of the substrate holders 230a, 230b, and 230c such that the substrate holders on the opposing surfaces are offset from one another.

[0052] Figures 3-7 illustrate embodiments employing three substrate holders on each side. It will be appreciated that the number and pattern of the substrate holders is not particularly limited and can be selected as desired for a particular purpose or intended application. The number, positions, and patern of substrate holders may be selected based on the size of the substrates to be processed and/or other physical constraints such as the deposition apparatus in which the carrier is being used, the materials for making the carrier, etc. Additionally, it will be appreciated that the number of holders on one side of the substrate carrier can be the same or different as the number of holders on the opposing side of the substrate carrier. Further, if the number, size and patern of holders are the same on each side of the substrate carrier, the paterns can be provided as mirror images to one another (see, e.g., Figures 4-7), or the patterns can be axially offset relative to each other (as, for example, in Figure 8). The degree and extent to which a patern of substrate holders on one surface is offset or axially rotated relative to the patern of substrate holders on the opposite surface is not particularly limited and can be chosen as desired for a particular purpose or intended application. Still even further, the size of the holders on a given side can be the same or different from one another. In one embodiment, the size of the holders on a first side can be different from the size of the holders on the opposing side.

[0053] The substrate carriers can be formed from any suitable material. Suitable materials for forming the substrate carrier include, for example, graphite, silicon, silicon nitride, silicon carbide, quartz, aluminum oxide, aluminum nitride, or metals such as stainless steel, Inconel, molybdenum, aluminum. The substrate carriers may also comprise a surface coating disposed about one or both surfaces of the carrier. Examples of suitable surface coatings include, but are not limited to, silicon carbide, silicon nitride, pyrolytic graphite, pyrolytic boron nitride, pyrolytic carbon, diamond, aluminum nitride, aluminum oxide, silicon dioxide, tantalum carbide, niobium carbide, zirconium carbide, or hafnium carbide.

[0054] The substrate carrier can be employed in any process suitable for applying a film or coating layer(s) to a substrate. Such processes can include vapor deposition process such as chemical vapor deposition, physical vapor deposition, etc. Some example processes include, but are not limited to, vapor phase epitaxy, metal-organic vapor phase epitaxy, organo- metallic vapor phase epitaxy, metal-organic chemical vapor deposition, organ-metallic chemical vapor deposition, thermal evaporation, sputtering etc., including those film/coating methods now known or later discovered. It will be appreciated that those skilled in the art will understand and know how to employ such methods to deposit one or more film/coating layers on a substrate material of interest.

[0055] In a film/coating process, the present substrate carriers may be employed as follows. A two-sided substrate carrier is provided having one or more substrate holders in a first surface and one or more substrate holders in a second surface opposite the first surface. Substrates to be coated are placed in the one or more substrate holders of the first surface. The substrate carrier is placed in a processing chamber with the surface containing the substrates to be coated exposed to receive a coating layer. A deposition process (CVD, PVD, etc.) is conducted to apply one or more coatings to the substrate(s). Following film/coating deposition, the substrate carrier is removed from the processing chamber, and the coated substrates are removed from the substrate carrier. The substrate carrier is then flipped, and target substrates to be coated are inserted in the substrate holders on the second surface of the substrate carrier. [0056] Figure 9 illustrates a two-sided substrate carrier in operation in a system 300.

The substrate carrier 100 is placed on a platform 310 supported by a shaft 320 extending substantially transverse to the platform. The shaft and the platform may be configured to heat the platform and/or for the platform to be rotated during the processing application. Target substrates 330 and 340 (e.g., a semiconductor wafers) to be treated are disposed in the wafer carrier holders 130a and 130c. A plug or dummy material 350 and 360 are provided in holders 140a and 140c respectively on the side that is in contact with the holder. The plug/dummy material may be provided to provide more contact area with the platform and to ensure that heat transfer through the substrate body is more uniform. The plugs can be provided of the same material as the material forming the carrier body. In some application, the plugs may not be required. Following treatment of the substrates 330 and 340, the substrates can be removed from the substrate holders 130a and 130c, and the plugs can be removed from the holders 140a and 140c. The substrate carrier can then be used again and the carrier is “flipped” such that surface 110 will be in contact with the platform 310, and the holders 140a and 140c can be used to support/hold target substrates that will under treatment/processing.

[0057] In operation, the end user may select the number of deposition cycles that a given side of the substrate carrier is exposed to before the opposite side of the carrier is employed to support and hold the substrates to be processed. In one embodiment, the substrate carrier is flipped or alternated after each deposition process is run or completed. It will be appreciated that the substrate carrier can be flipped after every two runs, after every three runs, etc. In other embodiment, the frequency of the alternation is decided based on the deposition thickness or time on each side, instead of number of cycles. In another embodiment, the substrate carrier can be “flipped” to after a selected deposition thickness is achieved on the side being used to support the substrate(s). The surface of the carrier exposed to the deposition process will receive a fuguitive coating. The substrate carrier can be flipped to employ the other side once a selected deposition thickness is achieved on a particular surface of the substrate. It may be desirable to keep that deposition thickness relatively small to avoid excessive deformation of the substrate due to any mismatch stress from the differences in the coefficient of thermal expansion of the coating and the substrate carrier. Without being bound to any particular theory, it may be more desirable to flip the carrier and alternate the surface that is supporting the substrates to be coated more frequently to decrease the stress buildup of a given surface and to increase the likelihood that the stresses are balanced out.

[0058] The substrate carriers can be employed in various coating or film deposition processes including, but not limited to, expanding thermal plasma (ETP), ion plating, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), metal organic chemical vapor deposition (MOCVD), metal organic vapor phase epitaxy (MOVPE), physical vapor deposition (PVD) processes such as for example, sputtering, reactive electron beam (e- beam deposition, and plasma spray.

[0059] What has been described above includes examples of the present specification.

It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the present specification, but one of ordinary skill in the art may recognize that many further combinations and permutations of the present specification are possible. Accordingly, the present specification is intended to embrace all such alterations, modifications and variations that fall within the spirit and scope of the appended claims. Furthermore, to the extent that the term “includes” is used in either the detailed description or the claims, such term is intended to be inclusive in a manner similar to the term “comprising” as “comprising” is interpreted when employed as a transitional word in a claim.

[0060] Examples

[0061] A conventional substrate carrier and a substrate carrier in accordance with aspects of the present technology were evaluated for deformation when exposed to processing to dispose silicon carbide coatings onto a substrate. The conventional substrate carrier has a configuration as illustrated in Figure 1. The carrier 10 is a graphite carrier body coated with tantalum carbide (TaC). The carrier includes substrate holders 12a, 12b, and 12c. The carrier in figure 1 is used to coat substrates with silicon carbide (SiC). Figure 1 shows the carrier after a deposition/coating trial and after the coated substrates have been removed. The darker area on the surface 14 of the carrier 10 is the fugitive silicon carbide coating received by the substrate carrier during coating of a substrate material. The lighter colored areas of holders 12a, 12b and 12c is from the tantalum carbide coating on the graphite body. These areas do not receive the fugitive coating from the deposition process as they are holding (and covered by) the substrate(s) that are subjected to the film deposition process.

[0062] The conventional carrier deformed after receiving a 30 pm silicon carbide fugitive deposition. As shown in Figure 1, there is a gap 20 between the carrier and the surface 30 on which the carrier is sitting. Figure 2 is a back surface profile of the carrier in Figure 1 measured by a coordinate measurement machine (CMM) and shows the deformation of the surface. The experiment also shows that the amount of bowing increases over time as the fugitive coating accumulates on the carrier and increases as the larger CTE mismatched carrier material is used (Table 1).

Table 1: Measured carrier flatness before and after number of CVD depositions

[0063] A wafer carrier with substrate holders on both surfaces was analyzed. The wafer carrier with substrate holders on both surfaces has a configuration similar to the wafer carrier of Figure 1 except that there are substrate holders on the opposing surface of the wafer carrier to what is shown in Figure 1. The substrate holders on the opposing surfaces are provided as mirror images to one another (as, for example, in Figure 4.) The carriers were used to coat substrates with silicon carbide (SiC). The SiC epitaxial deposition is typically held at 1600°C with gases of SiFft, C3H8 and Fh. Deposition rate ranges from 25 pm/hr to 90 pm/hr. The single sided carrier was employed in 3 runs. The double sided carrier was employed in four runs with 2 runs on each side. In both trials, roughly 10 um SiC coating was deposited each run. As shown in Table 2, the wafer carrier with substrate holders on both surfaces demonstrates much less deformation after receiving deposition on both surfaces after multiple runs.

Table 2: Measured carrier flatness on single-sided and double-sided carriers after use

[0064] The foregoing description identifies various, non-limiting embodiments of a substrate carrier. Modifications may occur to those skilled in the art and to those who may make and use the invention. The disclosed embodiments are merely for illustrative purposes and not intended to limit the scope of the invention or the subject matter set forth in the claims.