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Title:
ANALOG MEMORY-BASED COMPLEX MULTIPLY-ACCUMULATE (MACC) COMPUTE ENGINE
Document Type and Number:
WIPO Patent Application WO/2024/093510
Kind Code:
A1
Abstract:
A circuit comprises a first pulse-width modulator configured to generate a first pulse based on a first input, a second pulse-width modulator configured to generate a second pulse based on a second input, a first differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor, and a second differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor. A gate of the first transistor of the first differential circuit and a gate of the second transistor of the first differential circuit, and a gate of the first transistor of the second differential circuit and a gate of the second transistor of the second differential circuit are configured to be controlled by the first and second pulse width modulators based on the first input and the second input.

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Inventors:
MACKIN CHARLES (US)
NARAYANAN PRITISH (US)
Application Number:
PCT/CN2023/117187
Publication Date:
May 10, 2024
Filing Date:
September 06, 2023
Export Citation:
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Assignee:
IBM (US)
IBM CHINA CO LTD (CN)
International Classes:
H03K7/08
Foreign References:
CN105917578A2016-08-31
CN104321959A2015-01-28
CN102170221A2011-08-31
US20110038183A12011-02-17
Attorney, Agent or Firm:
LIU , SHEN & ASSOCIATES (CN)
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