Document |
Document Title |
JPS6463879A |
PURPOSE: To measure a gate delay time with high accuracy using an LSI tester, by mounting a means for counting the oscillation frequency of a ring oscillator for measuring gate delay to convert the same to analogue voltage. CONSTITUTION:...
|
JPS6438842U |
|
JPS6461118A |
PURPOSE: To provide two functions to one circuit by bringing J, K terminals of a JK flip-flop to all high level to act it as a flip-flop and bringing the levels of the J, K terminals opposedly to each other to cause D-FF operation thereb...
|
JPS6438841U |
|
JPS6458122A |
PURPOSE: To recognize the present count state even without observing display by providing a count output control means, comparing the count with a count operated by an external switch and causing a voice output at a number of times such ...
|
JPS6457189A |
PURPOSE: To accurately perform continuous measurement, by performing the change-over between a plurality of rows of counters at an accurate time interval and drawing up measured data obtained by this so as not to generate a non- sensitiv...
|
JPH0112703B2 |
|
JPS648933B2 |
|
JPS648766B2 |
|
JPS6436218A |
PURPOSE: To make the duty nearly 50% by providing an n-stage of D type FF, a logic circuit, and a D type FF circuit using an output of the logic circuit as the clock input, using the inverted output as the data input and using the output...
|
JPS646568B2 |
|
JPS6430324A |
PURPOSE: To prevent the failing in grasping not only an input signal pulse arriving during the displaying period but the input signal pulse at the time of switching the period by executing the switching of a counting action period and a ...
|
JPS6416740U |
|
JPS6423620A |
PURPOSE: To automatically correct a duty factor to about 50%, by outputting an odd dividing output signal outputted from an odd dividing means after the output signal is re-tapped by means of an output means by using the output signal of...
|
JPS6424510A |
PURPOSE: To prevent an up/down counter from malfunctioning even if an asynchronous clock signal or up/down control signal is inputted by counting the outputs of two flip-flop circuits which delay the output of a 1st flip-flop circuit by ...
|
JPS648725A |
PURPOSE: To eliminate the need for a peripheral circuit for counter reset by adopting the constitution such that an internal clock signal subject to frequency division is utilized as a pulse for counter reset. CONSTITUTION: An external c...
|
JPS647713A |
PURPOSE: To specify an output at the time of trouble and to make it into a safe side trouble by AND-processing a bias signal and an input signal, feeding back an output and executing self-holding. CONSTITUTION: Memory circuit is LS1∼LS...
|
JPS64854B2 |
|
JPS6367775B2 |
|
JPS6367774B2 |
|
JPS63316518A |
PURPOSE: To shorten a test time with a simple testing circuit by adding a gate circuit composed of an exclusive OR gate to the shit register of a frequency dividing circuit and inputting a testing signal. CONSTITUTION: To a shift registe...
|
JPS63313917A |
PURPOSE: To execute an exact summing processing by generating a present right time data by integrating summing pulse data for a range within one minute by a primary processor and obtaining the difference of the present right time data of...
|
JPS63503588A |
A look ahead terminal counter and a method for generating a terminal count output signal are disclosed. The counter comprises a plurality of counter registers connected to counter enable circuitry for sequencing the registers at a predet...
|
JPS6349949Y2 |
|
JPS63313014A |
PURPOSE:To reduce the delay of an output pulse to an input pulse by providing a pulse interruption control means which interrupts a microprocessor at the timing of the input pulse arriving right after a period clock. CONSTITUTION:A pulse...
|
JPS6366455B2 |
|
JPS6366470B2 |
PURPOSE:To put out unnecesary lamps while the value of a counter is changed, by detecting the closing of a switch determining the value of the counter and interrupting a current flowing to a lamp corresponding to the switch. CONSTITUTION...
|
JPS63310216A |
PURPOSE: To obtain a counting circuit which can read out a stable count value, even if an external event pulse is inputted at any time, by synchronizing it with the second internal clock, when the external event pulse is received. CONSTI...
|
JPS63196123U |
|
JPS63503481A |
A multi-mode counter network and a method of testing the operation of the multi-mode counter network are disclosed. The multi-mode counter network comprises a counter circuit formed of a plurality of counter registers and a multiplexer c...
|
JPS63299612A |
PURPOSE: To eliminate a back-up power source and to obtain a non-volatile device with the large maximum number of the times of countings by constituting a memory means of an EEPROM having plural memory cells and assigning a counted value...
|
JPS63299410A |
PURPOSE: To perform a test in a time equivalent to the test time of one of frequency divider even for the test of the frequency division circuit in which plural frequency dividers are connected in series, by inputting a testing clock fro...
|
JPS63290408A |
PURPOSE: To attain high speed variable frequency division by connecting a frequency divider having plural fixed frequency division ratios to a mixer operated by an analog signal. CONSTITUTION: Let an input frequency be (f), an output fre...
|
JPS63290409A |
PURPOSE: To simply execute the frequency division of non-integral numbers by providing a clock phase switch, a 1/N frequency divider and a 2nd frequency divider applying further 1/2 frequency division to the output and giving the result ...
|
JPS63181029U |
|
JPS6344791Y2 |
A process and an arrangement for the electronic interruption and the cancellations of the interruption of input pulses of a manually rotatable pulse generator in an electronic storage for the purpose of locking the storage condition, inc...
|
JPS6344790Y2 |
|
JPS6358411B2 |
|
JPS6357970B2 |
|
JPS63275224A |
PURPOSE: To draw out the maximum division frequency by constituting a power distributor, an interdigitate coupler and an inductance element on a film circuit substrate or a monolithic integrated circuit substrate. CONSTITUTION: The power...
|
JPS63272122A |
PURPOSE: To obtain a fail safe memory device to be troubled at the safe side when a circuit troubles by annihilating the output voltage of respective memory circuits even when the trouble and disconnection occur at any of respective line...
|
JPS6355251B2 |
|
JPS6340930Y2 |
|
JPS63163564U |
|
JPS6352494B2 |
The logic circuit has cascade-connected flip-flops A, B, C and D. The data inputs DA, DB, DC and DD to the flip-flops have gate arrangements GA, GB, GC and GD connected to them. The circuit receives either a shift signal SHT or a count s...
|
JPS6352495B2 |
|
JPS63250916A |
PURPOSE: To reduce the number of components, to miniaturize a device, and to lower cost, by providing a high speed memory, and providing a means which performs a pulse processing by applying time division on plural pulse string inputs an...
|
JPS6351607B2 |
|
JPS63246031A |
PURPOSE: To reduce malfunction due to chattering or noise for a switching signal of an input switch by providing a 1st charge/discharge circuit and a 2nd charge/discharge circuit. CONSTITUTION: When the input switch 1 is closed at a time...
|
JPS63244932A |
PURPOSE: To count plural events without increasing the number of counters, by using a RAM for storing the number of count of the event. CONSTITUTION: When the event is generated after the event (b) is selected by a selector (a), an addre...
|