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Title:
ULTRASONIC FLAW DETECTION METHOD, SYSTEM, PROGRAM, AND STORAGE MEDIUM
Document Type and Number:
Japanese Patent JP2018146520
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To efficiently carry out phased array UT by a number of sensors connected to an UT device by using a switch.SOLUTION: A plurality of sensors 30 each including a plurality of elements 31 are installed in an object to be inspected, the sensors 30 are connected to an UT device 20 so that with the elements 31 each selected from the sensors 30 set as one group, the elements 31 belonging to the same group can be selectively connected to the same connector 25 of the UT device 20 via a switch 40, a group of UT conditions including a plurality of UT conditions individually set for the sensors 30 is input en bloc to the UT device 20, UT is sequentially executed by the UT device 20 while switching the sensor 30 to be connected to the UT device 20 by the switch 40, and flaw detection data to which the sensors 30 and the UT conditions used for the UT is saved on the basis of the execution order of the UT conditions included in the group of the UT conditions.SELECTED DRAWING: Figure 10

Inventors:
SUZUKI YUTAKA
Application Number:
JP2017044345A
Publication Date:
September 20, 2018
Filing Date:
March 08, 2017
Export Citation:
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Assignee:
MITSUBISHI HITACHI POWER SYS
International Classes:
G01N29/26; G01N29/34
Domestic Patent References:
JP2010107284A2010-05-13
JP2851114B21999-01-27
JP2013156277A2013-08-15
JP2005034633A2005-02-10
JP2015040697A2015-03-02
Foreign References:
US20120095347A12012-04-19
Attorney, Agent or Firm:
Kaichi International Patent Office