Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME
Document Type and Number:
Japanese Patent JP2019062070
Kind Code:
A
Abstract:
To prevent a short circuit between a floating gate electrode and a selection gate electrode.SOLUTION: A semiconductor device comprises: floating gate electrodes FGE each including a pair of beveled parts CHF1 formed between a top surface TSF and third side faces SS3, respectively; element isolation trenches TRC formed in the semiconductor substrate SUB and adjacent to the third side faces SS3 in a plan view of a principal surface PSF of a semiconductor substrate SUB; a first insulation film IL1 formed on a top surface TSF, the beveled parts CHF1 and first parts PT1 of the respective third side faces SS3 exposed from an element isolation insulation film STI; and selection gate electrodes WGE each formed on a first side surface SS1 of a floating gate electrode FGE with a first side wall insulation film SWI1 interposed therebetween.SELECTED DRAWING: Figure 4
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Inventors:
MANSEI AKIRA
Application Number:
JP2017185155A
Publication Date:
April 18, 2019
Filing Date:
September 26, 2017
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L21/336; H01L27/11521; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Fukami patent office