Title:
METHOD FOR MANUFACTURING EPITAXIAL WAFER
Document Type and Number:
Japanese Patent JP2019186449
Kind Code:
A
Abstract:
To decrease lamination defects formed in an epitaxial wafer in a method for growing an epitaxial layer on a monocrystalline silicon substrate doped with phosphorus.SOLUTION: A method for manufacturing an epitaxial wafer comprises: a baking step (S2) of removing a natural oxide film on a substrate surface after previously cleaning a monocrystalline silicon substrate doped with phosphorus at a high concentration to achieve a satisfactory degree of cleanliness of a surface thereof; a step (S3) of performing a gaseous phase etching on the substrate surface by a hydrogen chloride gas; a step (S4) of purging the hydrogen chloride gas that remains in a reaction furnace; and an isothermal-holding step (S5) as a thermal treatment for eliminating or reducing a phosphorus precipitate that is present on the substrate. In the method, the steps are conducted in this order. In the isothermal-holding step, the substrate is held isothermally at a temperature of not lower than 700°C and below 1050°C (preferably a temperature of 750°C or higher and 850 or lower) for 30-450 seconds or more. After that, epitaxial growth is performed (S6). The method is arranged so as to include a cooling step neither in a series of the thermal treatment steps before the epitaxial growth nor in transfer to the growth step.SELECTED DRAWING: Figure 5
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Inventors:
SATO HIDEKI
Application Number:
JP2018077440A
Publication Date:
October 24, 2019
Filing Date:
April 13, 2018
Export Citation:
Assignee:
SHINETSU HANDOTAI KK
International Classes:
H01L21/205; C23C16/24; C30B25/20; C30B29/06; H01L21/20
Attorney, Agent or Firm:
Ryuji Harikawa
Kengo Yamauchi
Kengo Yamauchi