Title:
COPPER CLAD LAMINATE BOARD FOR FORMING BUILT-IN CAPACITOR LAYER, MULTILAYER PRINTED WIRING BOARD, AND METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD
Document Type and Number:
Japanese Patent JP2020021961
Kind Code:
A
Abstract:
To provide a capacitor layer forming material that does not cause cracks in a capacitor dielectric layer when a through hole for through hole formation is formed by drilling in a production of a multilayer printed wiring board with built-in high multilayer capacitor circuits.SOLUTION: The copper clad laminate board for forming a built-in capacitor layer is used for forming a built-in capacitor circuit of a copper layer/capacitor dielectric layer/copper layer in an inner layer of a multilayer printed wiring board to achieve this object. The capacitor dielectric layer has a layer structure of resin layer/resin film layer. A composite modulus Er obtained by measuring by nanoindentation method in the thickness direction of the resin film is less than 6.1 GPa.SELECTED DRAWING: Figure 1
Inventors:
KUWAKO FUJIO
MATSUSHIMA TOSHIFUMI
HOSOI TOSHIHIRO
MATSUSHIMA TOSHIFUMI
HOSOI TOSHIHIRO
Application Number:
JP2019201473A
Publication Date:
February 06, 2020
Filing Date:
November 06, 2019
Export Citation:
Assignee:
MITSUI MINING & SMELTING CO
International Classes:
H05K3/46
Domestic Patent References:
| JP2003332749A | 2003-11-21 | |||
| JP2006253656A | 2006-09-21 |
Foreign References:
| WO2006016586A1 | 2006-02-16 |
Attorney, Agent or Firm:
Katsuhiro Yoshimura