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Title:
【発明の名称】画質改善装置
Document Type and Number:
Japanese Patent JP2525450
Kind Code:
B2
Abstract:
PURPOSE:To reduce the capacity of the memory constituting a vertical-direction LPF from the conventional level so as to improve the picture quality by provid ing a data clock rate conversion circuit between a horizontal-direction LPF and the vertical-direction LPF and lowering the operating frequency of the vertical-direction LPF. CONSTITUTION:Luminance signals from an A/D conversion circuit 1 are supplied to a horizontal-direction LPF 10 and the LPF 10 extracts low-band components by filtrating the luminance signals about the horizontal direction and supplies the output to a 1st data clock rate conversion circuit 12. The circuit 12 converts the low-band extracted signals from the LPF 10 into signals whose data clock rate is one half of that of the low band extracted signals and supplies the signals to a vertical direction LPF 11. The LPF 11 extract vertical low-band components by filtrating the horizontal low-band extracted signals whose data clock rate is converted and supplies the filtrated signals, namely, two-dimension low-band extracted signals to a 2nd data clock rate conversion circuit 13. The operating frequency of the vertical-direction LPF 11 becomes one half of that of the horizontal-direction LPF 10.

Inventors:
Hideaki Miura
Rei Kobayashi
Application Number:
JP7559788A
Publication Date:
August 21, 1996
Filing Date:
March 29, 1988
Export Citation:
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Assignee:
NEC Home Electronics Co., Ltd.
International Classes:
H04N5/208; H04N9/68; (IPC1-7): H04N5/208; H04N9/68
Domestic Patent References:
JP6346880A
JP61137474A
JP59103418A



 
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