【発明の名称】プログラム可能な特定用途向け集積回路及び論理セル

Title:

【発明の名称】プログラム可能な特定用途向け集積回路及び論理セル

Document Type and Number:

Japanese Patent JP3302014

Kind Code:

B2

Abstract:

A field programmable gate array includes a programmable routing network, a programmable configuration network integrated with the programmable routing network; and a logic cell integrated with the programmable configuration network. The logic cell includes four two-input AND gates, two six-input AND gates, three multiplexers, and a delay flipflop. The logic cell is a powerful general purpose universal logic building block suitable for implementing most TTL and gate array macrolibrary functions. A considerable variety of functions are realizable with one cell delay, including combinational logic functions as wide as thirteen inputs, all boolean transfer functions for up to three inputs, and sequential flipflop functions such as T, JK and count with carry-in.

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Inventors:

Chan, Andrew Kay
Berkner, John M
Chua, Hua Tea

Application Number:

JP50827392A

Publication Date:

July 15, 2002

Filing Date:

March 02, 1992

Export Citation:

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Assignee:

Quick Logic Corporation

International Classes:

H03K17/00; H03K19/173; H03K3/356; H03K19/177; (IPC1-7): H03K19/173

Domestic Patent References:

JP180127A
JP6189721A
JP6330022A

Other References:

【文献】米国特許4758745(US,A)
【文献】国際公開90/11648(WO,A1)

Attorney, Agent or Firm:

Youichi Ohshima

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