Title:
【発明の名称】半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3374680
Kind Code:
B2
Abstract:
After an insulating layer made of BPSG is formed on a diffusion layer, a contact hole is formed to expose the diffusion layer. Then, a first aluminum layer is formed in the contact hole. Then, first and second TEOS layers are formed. Thereafter, a thin film resistor is formed on the second TEOS layer by photo-lithography and etching treatments. In this process, the other parts are covered with the second TEOS layer to prevent being damaged. As a result, occurrence of a leak current at the diffusion layer and the like can be prevented. Further, a third TEOS layer is formed on the thin film resistor, and then a second aluminum layer is formed to be electrically connected to the thin film resistor through a contact hole by an ECR dry etching treatment. In this etching treatment, the thin film resistor is not damaged due to the third TEOS layer.
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Inventors:
Shoji Miura
Satoshi Shiraki
Hajime Soga
Satoshi Shiraki
Hajime Soga
Application Number:
JP29397596A
Publication Date:
February 10, 2003
Filing Date:
November 06, 1996
Export Citation:
Assignee:
株式会社デンソー
International Classes:
H01L23/52; H01L21/02; H01L21/3205; H01L21/822; H01L21/84; H01L27/04; H01L27/13; (IPC1-7): H01L21/822; H01L21/3205; H01L27/04
Domestic Patent References:
| JP5326847A | ||||
| JP6291260A |
Attorney, Agent or Firm:
Hirohiko Usui (1 outside)