Title:
集積回路の診断装置および診断方法
Document Type and Number:
Japanese Patent JP4031954
Kind Code:
B2
Abstract:
An apparatus being able to not only detect a manufacturing defect of an integrated circuit but also specify a position at which the defect occurs even when outputs from scan paths are compressed and stored, or when the number of the scan paths is large. The apparatus has a pattern generator built in an integrated circuit to generate test patterns, a plurality of shift registers formed in parallel, into which the test patterns are shifted, and an output compressor for compressing a plurality of outputs shifted out from the shift registers with check bits of a Hamming code, and outputting them to the outside of the integrated circuit.
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Inventors:
Takahisa Hiraide
Application Number:
JP2002170051A
Publication Date:
January 09, 2008
Filing Date:
June 11, 2002
Export Citation:
Assignee:
富士通株式会社
International Classes:
G01R31/28; G01R31/3185; G06F11/22; H01L21/82; H01L21/822; H01L27/04
Domestic Patent References:
| JP8015382A | ||||
| JP63286780A | ||||
| JP5249197A | ||||
| JP1277782A | ||||
| JP8220192A | ||||
| JP81457B2 | ||||
| JP2553292B2 | ||||
| JP3184061B2 | ||||
| JP2004500558A | ||||
| JP2002236144A |
Attorney, Agent or Firm:
Yu Sanada