Title:
半導体記憶装置の製造方法
Document Type and Number:
Japanese Patent JP4226205
Kind Code:
B2
Abstract:
A semiconductor memory comprises: a first conductivity type semiconductor substrate and one or more memory cells constituted of an island-like semiconductor layer, a charge storage layer and a control gate, the charge storage layer and the control gate being formed to entirely or partially encircle a sidewall of the island-like semiconductor layer, wherein at least one of said one or more memory cells is electrically insulated from the semiconductor substrate.
Inventors:
Tetsuro Endo
Fujio Masuoka
Takuji Tanigami
Takashi Yokoyama
Noboru Takeuchi
Fujio Masuoka
Takuji Tanigami
Takashi Yokoyama
Noboru Takeuchi
Application Number:
JP2000286162A
Publication Date:
February 18, 2009
Filing Date:
August 11, 2000
Export Citation:
Assignee:
Fujio Masuoka
Sharp Corporation
Sharp Corporation
International Classes:
H01L21/8247; H01L21/28; H01L21/336; H01L21/8242; H01L21/8244; H01L21/8246; H01L21/84; H01L27/108; H01L27/11; H01L27/115; H01L27/12; H01L29/788; H01L29/792; G11C16/04
Domestic Patent References:
| JP7235649A | ||||
| JP6338602A | ||||
| JP4079369A | ||||
| JP1152660A | ||||
| JP11026702A | ||||
| JP62257763A | ||||
| JP61294854A | ||||
| JP8023040A | ||||
| JP9504655A |
Attorney, Agent or Firm:
Shintaro Nogawa
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