Title:
低応力半導体ダイ・アタッチ
Document Type and Number:
Japanese Patent JP4436765
Kind Code:
B2
Abstract:
A semiconductor device ( 121 ) is provided which comprises a substrate and a die ( 123 ) having a first surface which is attached to the substrate by way of a die attach material. At least a portion ( 127 ) of the perimeter of the die is resistant to wetting by the die attach material, either through treatment with a dewetting agent or by selective removal of the backside metallization. It is found that this construction allows the surface area of the die to be increased without increasing the incidence of cracking and chipping along the sawn edges of the die.
Inventors:
Condi, Brian W.
Durati, David Jay.
Durati, David Jay.
Application Number:
JP2004564760A
Publication Date:
March 24, 2010
Filing Date:
September 30, 2003
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H01L21/58; H01L21/52; H01L21/60; H01L23/00; H01L23/48
Domestic Patent References:
| JP52109872A | ||||
| JP6326141A | ||||
| JP6120283A |
Attorney, Agent or Firm:
Mamoru Kuwagaki