Title:
半導体基板に活性領域と分離領域を形成する方法及び集積回路を形成する方法
Document Type and Number:
Japanese Patent JP4508129
Kind Code:
B2
Abstract:
The construction of Shallow Trench Isolation, STI, regions is integrated in to a SIMOX fabrication process for a Silicon On Insulator, SOI, wafer. Prior to the beginning of the SOI process, a preferred nitrogen (N2) implant is applied to the silicon wafer in areas designated as active regions. The nitrogen modifies the oxidation rate of later implanted oxygen. Regions where the N2 is implanted result in thinner oxide layers. The SIMOX process can begin following the implantation of nitrogen. This results in buried regions of thick and thin oxide layers at fixed depths in the Si substrate. Excess Si on top of the buried thick and thin oxide regions can be polished down to the thick oxide regions to form the active device regions over the thin oxide regions. Thus, the SOI wafer exhibits an STI structure upon completion of the SOI process without a need for additional STI manufacturing steps.
More Like This:
Inventors:
Michael hargrove
Application Number:
JP2006046440A
Publication Date:
July 21, 2010
Filing Date:
February 23, 2006
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L21/76; H01L21/02; H01L21/265; H01L21/762; H01L27/12
Domestic Patent References:
| JP8045868A | ||||
| JP2005051139A | ||||
| JP11330263A | ||||
| JP10189571A |
Attorney, Agent or Firm:
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa
Fujitsuna Hideyoshi
Osamu Suzawa