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Title:
半導体集積回路装置の製造方法
Document Type and Number:
Japanese Patent JP4782069
Kind Code:
B2
Abstract:

To enhance the reliability of a semiconductor integrated circuit device having multiple kinds of field-effect transistors whose gate insulating films have different thicknesses.

A method for manufacturing a semiconductor integrated circuit device having a first field effect transistor Q1 whose gate insulating film is formed on a first device forming region of the main surface of a semiconductor substrate and a second field effect transistor Q2 whose gate insulating film, which has a larger thickness than that of the gate insulating film of the first field effect transistor, is formed on a second device forming region of the main surface of the semiconductor substrate, comprises the steps of: forming thermal oxidation films on the first and second device forming regions of the main surface of the semiconductor substrate; forming a deposited film on the main surface of the semiconductor substrate including the thermal oxidation films; removing the deposited film and the thermal oxidation film on the second device forming region; forming a thermal oxidation film on the second device forming region; and forming gate insulating films on the first and second device forming regions.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
Shoji Sukuri
Norio Suzuki
Yasuhiro Taniguchi
Application Number:
JP2007124100A
Publication Date:
September 28, 2011
Filing Date:
May 09, 2007
Export Citation:
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Assignee:
Renesas Electronics Corporation
International Classes:
H01L27/088; H01L21/8234; H01L21/8238; H01L21/8242; H01L21/8247; H01L27/092; H01L27/10; H01L27/108; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
JP6061499A
JP8204142A
JP4177728A
JP6222387A
JP10022397A
JP8130250A
JP4122063A
JP1283872A
JP7245267A
JP55123133A
Attorney, Agent or Firm:
Akita Haruki