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Title:
半導体集積回路装置及びその製造方法
Document Type and Number:
Japanese Patent JP4782070
Kind Code:
B2
Abstract:

To enhance reliability of a semiconductor integrated circuit device having a plurality of types of field-effect transistors having different gate insulating film thicknesses.

A method of manufacturing a semiconductor integrated circuit device which has a first field-effect transistor Q1 in which a gate insulating film is formed on a first element forming region on a main surface of a semiconductor substrate, and a second field-effect transistor Q2 in which a gate insulating film having a thickness smaller than that of the gate insulating film of the first field-effect transistor is formed on a second element forming region on a main surface of the semiconductor substrate, includes a process of forming thermally oxidized films on the first element forming region and the second element forming region on the main surface of the semiconductor substrate. Next, a deposited film is formed on the main surface of the semiconductor substrate including the thermally oxidized films; subsequently, the deposited film and thermally oxidized film on the second element forming region are removed; and then, a thermally oxidized film is formed on the second element forming region to form gate insulating films on the first element forming region and the second element forming region, respectively.

COPYRIGHT: (C)2007,JPO&INPIT


Inventors:
Shoji Sukuri
Norio Suzuki
Yasuhiro Taniguchi
Application Number:
JP2007124106A
Publication Date:
September 28, 2011
Filing Date:
May 09, 2007
Export Citation:
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Assignee:
Renesas Electronics Corporation
International Classes:
H01L27/088; H01L21/8234; H01L21/8247; H01L27/10; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
JP6061499A
JP10022397A
JP8130250A
JP4122063A
JP1283872A
JP7245267A
JP55123133A
Attorney, Agent or Firm:
Akita Haruki