Title:
無線受信回路、並びに無線トランシーバ回路及びそのキャリブレーション方法
Document Type and Number:
Japanese Patent JP4934529
Kind Code:
B2
Abstract:
Conventional digital calibration type analog-to-digital converters cannot converge calibration within an preamble period of a packet signal. An analog-to-digital converter is subjected to digital calibration using a beacon signal, a polling signal, or another user signal or a signal applied from a transceiver side to a receiver side. Some or all of circuits are brought into a sleep mode in a period except data reception and the analog-to-digital converter calibration such that a signal monitor unit detects another signal to activate the circuit in the sleep mode for performing the calibration of the analog-to-digital converter for reducing the power consumption.
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Inventors:
Shun Oshima
Daizo Yamawaki
Daizo Yamawaki
Application Number:
JP2007179701A
Publication Date:
May 16, 2012
Filing Date:
July 09, 2007
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
H03M1/10; H03G3/20; H03G3/30; H03M1/12; H04B3/11
Domestic Patent References:
| JP2005229518A | ||||
| JP11506573A | ||||
| JP2006121146A |
Attorney, Agent or Firm:
Polaire Patent Business Corporation