Title:
半導体ウェーハを検査するシステム及び方法
Document Type and Number:
Japanese Patent JP5060684
Kind Code:
B2
Abstract:
A method for inspecting semiconductor wafers is provided in which a plurality of independent, low-cost, optical-inspection subsystems are packaged and integrated to simultaneously perform parallel inspections of portions of the wafer, the wafer location relative to the inspection being controlled so that the entire wafer is imaged by the system of optical subsystems in a raster-scan mode. A monochromatic coherent-light source illuminates the wafer surface. A darkfield-optical system collects scattered light and filters patterns produced by valid periodic wafer structures using Fourier filtered. The filtered light is processed by general purpose digital-signal processors. Image subtraction methods are used to detect wafer defects, which are reported to a main computer to aid in statistical process control, particularly for manufacturing equipment.
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Inventors:
Rosengauss Elisa
Lange Stephen Earl.
Lange Stephen Earl.
Application Number:
JP2000546223A
Publication Date:
October 31, 2012
Filing Date:
April 30, 1999
Export Citation:
Assignee:
KLA-Tenker Corporation
International Classes:
G01B11/30; H01L21/66; G01N21/95; G01N21/956; G06T1/00; H01L21/677
Domestic Patent References:
| JP64086528A | ||||
| JP5259259A | ||||
| JP10054806A | ||||
| JP7129741A | ||||
| JP7201946A | ||||
| JP9283582A | ||||
| JP6151297A | ||||
| JP2035341A |
Attorney, Agent or Firm:
Meisei International Patent Office