Title:
半導体装置及び計測機器
Document Type and Number:
Japanese Patent JP5467160
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device and a measurement instrument, which achieve downsizing and reduction in wiring resistance.SOLUTION: A semiconductor device comprises: an electronic component which includes an oscillation element and a plurality of terminals on one surface; a semiconductor chip which is electrically connected with the electronic component and includes a plurality of terminals on one surface; a mounting substrate on which the terminals of the electronic component and the terminals of the semiconductor chip are mounted so as to run in the same direction; first bonding wires connected to the terminals of the semiconductor chip; second bonding wires which connect the terminals of the electronic component and the terminals of the semiconductor chip, respectively, and a topmost height of each is lower than the first bonding wire; and an encapsulation component for encapsulating the electronic component, the semiconductor chip, the mounting substrate, the first bonding wires, and the second bonding wires.
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Inventors:
Kengo Takemasa
Yuichi Yoshida
Norihisa Sone
Kazuya Yamada
Akihiro Takei
Yuichi Yoshida
Norihisa Sone
Kazuya Yamada
Akihiro Takei
Application Number:
JP2013008640A
Publication Date:
April 09, 2014
Filing Date:
January 21, 2013
Export Citation:
Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
H01L25/00; H01L21/60; H01L23/50
Domestic Patent References:
JP6005771A | ||||
JP2006245618A | ||||
JP2007157958A | ||||
JP2007234994A | ||||
JP200847679A | ||||
JP201010492A | ||||
JP2011216916A |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Hiroshi Fukuda
Kato Kazunori
Hiroshi Fukuda