Title:
半導体装置
Document Type and Number:
Japanese Patent JP5849670
Kind Code:
B2
Abstract:
A first impurity diffusion region is provided within a semiconductor substrate, a second impurity diffusion region is provided within the first impurity diffusion region, a third impurity diffusion region is provided within the second impurity diffusion region, a first portion of a fourth impurity diffusion region is provided within the second impurity diffusion region so as to be spaced from the third impurity diffusion region, and a second portion of the fourth impurity diffusion region is provided in a third portion of the first impurity diffusion region on a side of a surface of the semiconductor substrate, a first contact is provided so as to be in contact with the second portion, the first contact and the third portion overlap in plan view, and a first power supply is connected to the third impurity diffusion region.
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Inventors:
Masaki Okuyama
Hisakatsu Sato
Hisakatsu Sato
Application Number:
JP2011269891A
Publication Date:
February 03, 2016
Filing Date:
December 09, 2011
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L27/06; H01L21/822; H01L21/8238; H01L27/04; H01L27/092
Domestic Patent References:
| JP2010021228A | ||||
| JP2006013450A | ||||
| JP2002026315A | ||||
| JP59217368A | ||||
| JP2009088139A | ||||
| JP2006202847A | ||||
| JP2001110995A |
Attorney, Agent or Firm:
Masahiko Ueyanagi
Osamu Suzawa
Osamu Suzawa