Title:
被疑診断回路と情報処理装置及び被疑診断方法とプログラム
Document Type and Number:
Japanese Patent JP6408498
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve accuracy for specifying a suspicious object of an error by making it possible to discriminate whether a bus error periodically occurs.SOLUTION: This suspicious diagnosis circuit includes: comparison means for comparing the number of retry times of access with a first threshold and with second threshold larger than the first threshold on the basis of the success/failure of the access to a device to be connected to a bus; flag management means for setting a flag and a time and resetting the flag which passes a predetermined or more time from the time in the case that the number of retry times is equal to or more than the first threshold; and suspicious specification means for specifying a suspicious object on the basis of the success/failure of the access and the flag in the case that the number of retry times is equal to or more than the second threshold.SELECTED DRAWING: Figure 1
Inventors:
Yasuhiko Tanabe
Application Number:
JP2016002263A
Publication Date:
October 17, 2018
Filing Date:
January 08, 2016
Export Citation:
Assignee:
NEC Platforms, Ltd.
International Classes:
G06F11/07; G06F11/14
Domestic Patent References:
| JP11191073A | ||||
| JP10247167A | ||||
| JP2015014762A | ||||
| JP2001075878A | ||||
| JP2011040886A |
Attorney, Agent or Firm:
Masahiko Desk
Naoki Shimosaka
Naoki Shimosaka