Title:
半導体装置
Document Type and Number:
Japanese Patent JP6445635
Kind Code:
B2
Abstract:
A memory device includes a memory cell storing data as stored data, an output signal line, and a wiring to which a voltage is applied. The memory cell includes a comparison circuit performing a comparison operation between the stored data and search data and taking a conduction state or a non-conduction state in accordance with the operation result, and a field-effect transistor controlling writing and holding of the stored data. A voltage of the output signal line is equal to the voltage of the wiring when the comparison circuit is in the conduction state.
Inventors:
Daisuke Matsubayashi
Application Number:
JP2017163000A
Publication Date:
December 26, 2018
Filing Date:
August 28, 2017
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/8242; H01L27/108
Domestic Patent References:
| JP2002094029A | ||||
| JP11040772A | ||||
| JP2007250983A | ||||
| JP2009135380A |
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