Title:
電子制御装置
Document Type and Number:
Japanese Patent JP6658417
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a technique for efficiently using a memory and determining whether or not an ECC device is in a normal state.SOLUTION: A data generation part 133 is configured so as to acquire data from a memory 131 and generate diagnostic data which indicates data in which, 2 or more of a bit is reversed in the data. A data input part 11 is configured to input the diagnostic data as read data, to an abnormality detection circuit 132 which outputs abnormality detection information which indicates a fact that, there is abnormality in the read data when there is an error of 2 bits or more, between written data which indicates the data when being written in the memory when reading the data from the memory, and read data which indicates data when read from the memory. A normal determination part 11 is configured to determine that, the abnormality detection circuit is in a normal state, when the diagnostic data is input to the abnormality detection circuit, and when abnormality detection information is output from the abnormality detection circuit.SELECTED DRAWING: Figure 1
Inventors:
Eiji Matsuoka
Application Number:
JP2016176821A
Publication Date:
March 04, 2020
Filing Date:
September 09, 2016
Export Citation:
Assignee:
株式会社デンソー
International Classes:
G06F11/22
Domestic Patent References:
| JP6052008A | ||||
| JP3252828A | ||||
| JP4251339A | ||||
| JP2005078431A |
Attorney, Agent or Firm:
Nagoya International Patent Service Corporation