Title:
シリアルデータの受信回路、トランシーバ回路、電子機器、アイドル状態の検出方法
Document Type and Number:
Japanese Patent JP6695200
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a receiving circuit capable of reliably detecting an edge of reception data.SOLUTION: A receiving circuit 2 receives reception data S1 with a serial format. A first edge detection circuit 30 detects an edge of the reception data S1. A first flip-flop 32 latches the reception data S1 according to a recovery clock CK. A first logical gate 34 performs logical operation of the reception data S1 and output S5 of the first flip-flop 32, and generates a first detection signal S3 indicating whether there is an edge of the reception data S1.SELECTED DRAWING: Figure 2
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Inventors:
Masataka Oguchi
Application Number:
JP2016077250A
Publication Date:
May 20, 2020
Filing Date:
April 07, 2016
Export Citation:
Assignee:
ROHM Co., Ltd.
International Classes:
H04L7/033
Domestic Patent References:
| JP2007312131A | ||||
| JP9046326A | ||||
| JP2002198941A |
Foreign References:
| US6907096 |
Attorney, Agent or Firm:
Sakaki Morishita
Masaki Taiki
Masaki Taiki