Title:
欠陥検査装置
Document Type and Number:
Japanese Patent JP6752593
Kind Code:
B2
Abstract:
Provided is a defect inspection device capable of suppressing the overlooking of defects and the erroneous detection of defects. Specifically, this defect inspection device 100 is provided with a control unit 50 for detecting the edge 74 outside a peripheral area 72 of an element chip 70 and an effective area 71 of the element chip on the basis of an image of the element chip 70 imaged by an imaging unit 40, determining an inspection area 75 for defect inspection of the element chip 70 on the basis of the detected edge 74 outside the peripheral area 72 and the effective area 71, and detecting a defect in the element chip 70 by comparing an image corresponding to the inspection area 75 of the element chip 70 with an image of a non-defective element chip 70 that has been prepared beforehand.
Inventors:
Hisa Yamamoto
Application Number:
JP2016043273A
Publication Date:
September 09, 2020
Filing Date:
March 07, 2016
Export Citation:
Assignee:
Toray Engineering Co., Ltd.
International Classes:
G01N21/956; H01L21/66
Domestic Patent References:
| JP2007324241A | ||||
| JP2005024565A | ||||
| JP5308159A | ||||
| JP2002323310A | ||||
| JP2009506339A |
Foreign References:
| CN102053093A | ||||
| WO2005001456A1 |
Attorney, Agent or Firm:
Hirokazu Miyazono