Document Type and Number:
Japanese Patent JPS5717379
Kind Code:
B2
Abstract:
Two P-channel MOS devices and two N-channel MOS devices are interconnected in a manner to provide a polarity reversal circuit. The circuit contains two input terminals and two output terminals. One of the output terminals is designated as a positive terminal while the other is designated as a negative terminal. Regardless of the polarity of voltage supplied to the input terminals, the positive voltage will always appear on the positive output terminal while the negative voltage will always appear on the negative output terminal.
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Application Number:
JP12141478A
Publication Date:
April 10, 1982
Filing Date:
October 02, 1978
Export Citation:
International Classes:
H03K19/00; H01L27/02; H01L27/092; H02H11/00; H02M7/21; H02M7/219; H03K17/00; H03K19/0948; H03K19/20