PURPOSE: To decrease the dependancy of selective pattern of the operating characteristics and to simplify the test, by accessing a storage cell of a designated address after accessing the storage cell of a specific address.

CONSTITUTION: An address latch section 1 outputs a set of an address of a cell selected for data read/write with an address latch lock ALC and a set signal setting a fixed address of a specific cell to be passed through without fail sequentially and transmits them to an address gate decoder section 2. The section 2 decodes the said one set of selection address and fixed address and gives them to a storage cell array section 3. The section 3 consists of a pluraity of storage cells and a sense amplification section 4 amplifies data signal read from the section 3 and gives the signal to an output latch section 5. The section 5 latches the amplified data at the section 4 from an output latch clock OLC.