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Title:
CONTROLLER FOR MICROPROGRAM
Document Type and Number:
Japanese Patent JPS58129658
Kind Code:
A
Abstract:

PURPOSE: To selectively assign a register in a general register bank by decoding the contents of a general register specifying field included in a microinstruction respectively in accordance with plural interrupt levels.

CONSTITUTION: It is supposed that a set/reset type flip-flop 8 is set up at interrupt levels LV0, LV1. Since the output of an interrupt register 3 is 00 at the level LV0, the output of a gate 4 is "1". If an output line 10 of a general register specifying field area 2 in a microinstruction register 1 is "0", the output of a gate 5 is turned to "1" and the even register No. smaller than the odd register No. only by "1" is specified. In case of the level LV1, the output of the interrupt register 3 is 01 and the output of the gate 4 is "0". When the output line 10 of the general register specifying field area 2 is "0", the output of te gate is "0" and the even register No. is not specified.


Inventors:
TAKAGAKI KAZUO
Application Number:
JP1356382A
Publication Date:
August 02, 1983
Filing Date:
January 29, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F9/22; G06F9/46; G06F9/48; (IPC1-7): G06F9/46
Attorney, Agent or Firm:
Toshi Inoguchi



 
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