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Title:
FAULT MONITOR SYSTEM
Document Type and Number:
Japanese Patent JPS58130660
Kind Code:
A
Abstract:

PURPOSE: To detect assuredly the presence or absence of a fault witgout deteriorating the economical properties of a scanner, by providing a monitor means to monitor the advancing pulse that drives a scanning part which scans te scanning points successively with a prescribed cycle.

CONSTITUTION: An advancing pulse (p) is transmitted to a latch circuit 23 provided to correspond to each scanner 8 within a transmission control circuit 9 from a microinstruction egister of the scanner 8. Each circuit 23 is selected by a selecting circuit 24 with a circulating selection of a cycle T4 much longer than a repetitive cycle T3 and the connected to a deciding circuit 25. The circuit 25 checks whether the connected circut 23 is held or not and then restores the corresponding circuit 23. If some part of the cicuit of a scanner 8 has a fault, the microinstruction register does not deliver the pulse (p) any more. Therefore the corresponding circuit 23 never work again when it is once restored, and it is detected that the circuit 23 is restored when it is selected by the circuit 24 after the cycle T4. Then it is decided that the coresponding scanning circuit 8 has a fault.


Inventors:
TAKECHI HIROAKI
YAMASHITA HIDEJI
KUNIGAMI TOSHIO
NAGAHAMA YASUTSUGU
Application Number:
JP1299382A
Publication Date:
August 04, 1983
Filing Date:
January 29, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04M3/22; G06F11/30; H04Q3/00; (IPC1-7): G06F11/30; H04M3/22
Attorney, Agent or Firm:
Koshiro Matsuoka



 
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