Title:
MULTIPROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JPS58154062
Kind Code:
A
Abstract:
Cache directory entry replacement for central processors (CPs) in a multiprocessor (MP) utilizes task identifiers (TIDs) provided in each directory entry to identify the program task which inserted the respective entry. A remote TID register (11) is provided to receive the TID from any remote CP in the MP on each cache miss cross-interrogation hit from any remote CP. Each time a respective CP (i.e. local CP) makes a storage request to its private cache directory, the TIDs are compared (in 18) to any remote TID in the CP's remote TID register. A TID candidate is any entry which compares equal to the remote TID and is not equal to the current local processor TID. It is identified as a candidate for replacement in the local cache directory on a cache miss. The candidate priorities in replacement selection circuit (51) are; highest priority is any invalid entry, next is any TID candidate, and lowest priority is the conventional LRU candidate. The TID operation obtains early castout to main storage of any cache line associated with a task being executed in a remote CP and not associated with the task being executed in the CP casting out the line, and thus reduces the potential for future cross-interrogation hits.
Inventors:
ROBAATO PAASHII FURETSUCHIYAA
Application Number:
JP21478882A
Publication Date:
September 13, 1983
Filing Date:
December 09, 1982
Export Citation:
Assignee:
IBM
International Classes:
G06F12/12; G06F12/08; G06F15/16; (IPC1-7): G06F13/00; G06F15/16
Attorney, Agent or Firm:
Koichi Tonmiya