Title:
【発明の名称】整流回路
Document Type and Number:
Japanese Patent JPS5910154
Kind Code:
B2
Abstract:
A novel current rectifying circuit for balanced input currents using a selective type of current mirror with two coupled current paths each extending from an input terminal, in which current paths currents of substantially equal magnitude are maintained. This current mirror is adapted to conduct the greatest (or smallest as the case may be) or currents applied to the input terminals. With such a current mirror a rectifying circuit is obtained by connecting each input terminal via a unidirectional currentpath to an output terminal and applying the balanced input currents to the input terminals. As a result of this currents equal to the greatest (or smallest as the case may be) of both components of the balanced input currents will flow through both current paths and the difference will flow to the output terminal thereby achieving full-wave rectifying.
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Inventors:
RUDEII YOHAN FUAN DE PURATSUSE
Application Number:
JP8666376A
Publication Date:
March 07, 1984
Filing Date:
July 22, 1976
Export Citation:
Assignee:
FUIRITSUPUSU FURUUIRANPENFUABURIKEN NV
International Classes:
G01R19/22; H02M7/12; H02M7/21; (IPC1-7): H02M7/217
Attorney, Agent or Firm:
Akihide Sugimura