Title:
ALIGNMENT FOR FINE SEMICONDUCTOR CHIP
Document Type and Number:
Japanese Patent JPH01162345
Kind Code:
A
Abstract:
PURPOSE:To connect the connecting pads of a semiconductor chip with the connecting pads of a connecting substrate with high precision by a method wherein the reflected light reflected by an alignment mark formed on the connecting substrate and the projected image of a photo absorption layer on the chip are aligned to each other. CONSTITUTION:Optical absorption layers 1b and 1b' and transparent layers 1c and 1c' are formed on the surface of a chip substrate 1a and connecting pads 1d and 1d' are formed thereon. On the other hand, connecting pads 2a and 2a' are formed on the surface of a connecting substrate 2. When incident light 4, which is transmitted the substrate 1a, is irradiated, this incident light is absorbed and is not reflected at the parts of the layers 1b and 1b', is transmitted at parts that no optical absorption layer is formed on the substrate 1a and is reflected by an alignment mark 3 on the substrate 2. By aligning this reflected light 5 of the form of the alignment mark to the projected image of the optical absorption layer (a black circle) 1b, the pads 1d and 1d' of the chip 1 and the pads 2a and 2a' of the substrate 2 are aligned to each other with high precision and can be connected to each other.
Inventors:
MAKIUCHI MASAO
Application Number:
JP32197587A
Publication Date:
June 26, 1989
Filing Date:
December 18, 1987
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/60; (IPC1-7): H01L21/60
Attorney, Agent or Firm:
Sadaichi Igita
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