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Title:
AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JPH03210808
Kind Code:
A
Abstract:

PURPOSE: To offer an amplifier circuit whose transistor(TR) is not destroyed due to electrostatic disturbance whose high frequency characteristic is not deteriorated by forming the base.emitter junction area of 1st and 2nd TRs to be ratio of (m) to '1', forming that of 3rd and 4th TRs to be ratio of '1' to (m), and selecting the same current for 2nd 3rd current sources.

CONSTITUTION: TRs 1, 4 are formed to have an area of a multiple of (m) so that the base.emitter junction area ratio of TRs 1, 2 and 13, 14 is respectively (m) to '1' and '1' to (m) (m is a real number being more than '1'). Moreover, a same current is selected for current sources 6, 7. An emitter level of the TR 13 is supplied to the base of the TR 1 as a bias level, and an emitter level of the TR 14 is supplied to the base of the TR 4 as a bias level. Thus, the bases of the TRs 1, 2 are biased with an input offset voltage at all times. Thus, the emitter current of the TRs 1, 2 is balanced for all temperature ranges.


Inventors:
TANIGUCHI TOSHIMI
Application Number:
JP548890A
Publication Date:
September 13, 1991
Filing Date:
January 12, 1990
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03F3/45; (IPC1-7): H03F3/45
Attorney, Agent or Firm:
Uchihara Shin



 
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