Title:
ANALOG SWITCH CIRCUIT AND VARIABLE ATTENUATOR USING THE SAME
Document Type and Number:
Japanese Patent JP2014135626
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide an analog switch circuit that, when turned on, is unlikely to exceed a withstanding voltage and, when turned off, easily holds a reliable off state, upon the input of a large signal.SOLUTION: The analog switch circuit includes: a control terminal CNTL; an input terminal IN and an output terminal OUT; a transistor Mhaving a bulk terminal B; a first impedance element Rconnected between a gate terminal G of the transistor Mand the control terminal CNTL, and having a higher impedance than a parasitic capacitance Cof the transistor Mbetween the gate terminal G and a source terminal S or a parasitic capacitance Cbetween the gate terminal G and a drain terminal D; and second and third impedance elements Z, Zdisposed between the source S and the bulk terminal B of the transistor Mand between the drain D and the bulk terminal B, and having a lower impedance than a parasitic capacitance Cof the transistor Mbetween the bulk terminal B and the source terminal S or a parasitic capacitance Cbetween the bulk terminal B and the drain terminal D.
Inventors:
HIRAOKA TOKUMASA
Application Number:
JP2013002303A
Publication Date:
July 24, 2014
Filing Date:
January 10, 2013
Export Citation:
Assignee:
ASAHI KASEI DENSHI KK
International Classes:
H03K17/687; H03K17/00
Attorney, Agent or Firm:
Tetsuya Mori
Megumi Konishi
Hide Tanaka Tetsu
Megumi Konishi
Hide Tanaka Tetsu
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