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Patent Searching and Data


Title:
APPARATUS AND METHOD FOR POWER SUPPLY
Document Type and Number:
Japanese Patent JP2001346329
Kind Code:
A
Abstract:

To suppress the power consumption of a standby mode sufficiently and conduct power supply at prescribed intervals.

A primary winding T1 and a switching circuit 1 are serial- inserted between input terminals Ti1 to which AC power supply is given. A diode 2, a resistor 3, and a capacitor 4 are serial-inserted in parallel to the primary winding T1. A detection circuit 5 is connected to both ends of the resistor 4, and connected to the emitter and collector of a phototransistor 7b. In a control circuit 6, a switching circuit 1 is controlled. A diode bridge 8 and a capacitor 9 are provided for a secondary winding T2. An output terminal To1, To2 are connected to both ends of the capacitor 9. A voltage detection circuit 10 is provided in parallel to the capacitor 9. In the voltage detection circuit 10, the voltage outputted from the output terminals To1, To2 is detected, and the detected voltage is supplied to a control circuit 11. In the control circuit 11, a light emitting diode 7a is controlled.


Inventors:
NAGAI TAMIJI
IKEDA TAMON
YAMAZAKI KAZUO
Application Number:
JP2000164094A
Publication Date:
December 14, 2001
Filing Date:
June 01, 2000
Export Citation:
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Assignee:
SONY CORP
International Classes:
H02J1/00; H02M3/28; (IPC1-7): H02J1/00; H02M3/28
Attorney, Agent or Firm:
Masatomo Sugiura