Title:
APPARATUS FOR POSITIONING MASK WITH SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPS6248020
Kind Code:
A
Abstract:
The present invention is directed to positioning a mask having an adjustment mark relative to a semi-conductor wafer being provided with at least one lattice structure and is concerned with keeping the area of the adjustment mark and mask as small as possible and providing an easy distinguishing of the direction of misalignment therebetween. The adjustment mark comprises at least two groups of gratings having different grid directions. In order to distinguish between misalignment which occurs in opposite directions, different grid spacings are provided. Preferably, the patterns are in strips and the adjustment mark comprises strips.
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Inventors:
KAARU HAINTSU MIYURAA
Application Number:
JP19647986A
Publication Date:
March 02, 1987
Filing Date:
August 21, 1986
Export Citation:
Assignee:
SIEMENS AG
International Classes:
H01L21/68; G03F9/00; H01L21/027; H01L21/67; (IPC1-7): G03F9/00; H01L21/30; H01L21/68
Attorney, Agent or Firm:
Tomimura Kiyoshi
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