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Title:
ARITHMETIC PROCESSING UNIT, INFORMATION PROCESSING UNIT, AND CONTROL METHOD FOR ARITHMETIC PROCESSING UNIT
Document Type and Number:
Japanese Patent JP2015219813
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide an arithmetic processing unit for reducing latency required for the data readout of a processor core, an information processing unit, and a control method for the arithmetic processing unit.SOLUTION: An arithmetic processing unit connected to a main storage device includes: a cache memory part for storing data; an arithmetic part for performing an arithmetic operation to the data stored in the cache memory part; a first control part for controlling the cache memory part, and for outputting a first request for reading out the data stored in the main storage device; and a second control part connected to the main storage device for transmitting a plurality of second requests obtained by dividing the first request output by the first control part to the main storage device, and for receiving the data corresponding to those transmitted second requests from the main storage device, and for transmitting the data to the first control part.

Inventors:
TOYODA YUTA
HOSOE KOJI
AIHARA MASATOSHI
TOKIYODA AKIO
SUGA MAKOTO
Application Number:
JP2014104294A
Publication Date:
December 07, 2015
Filing Date:
May 20, 2014
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F12/08
Domestic Patent References:
JP2004246898A2004-09-02
JPS61177557A1986-08-09
JP2010157113A2010-07-15
JP2009157680A2009-07-16
JP2004246898A2004-09-02
JPS61177557A1986-08-09
JP2010157113A2010-07-15
JP2009157680A2009-07-16
Attorney, Agent or Firm:
Kenji Doi
Hayashi Tsunetoku



 
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