Title:
ARM-ON DETECTING CIRCUIT FOR ON-DELAY COMPENSATION
Document Type and Number:
Japanese Patent JP3644531
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To accurately detect arm voltage pulse of an inverter for on-delay compensation.
SOLUTION: Detection circuits C1 to C6 for detecting the on, off states of inverter arms of switching elements S1 to S6 to detect arm voltage pulses of the inverter from the results are provided to accurately detect them, without detection delays. Since the outputs of the circuits C1, C3 and C5 of the upper side arms are high voltage levels as they are, the outputs are lowered to a voltage level of the signal to be handled by a control circuit by level reducing circuits Dw1, Dw3 and Dw5, and then given them to the on-delay compensator of the control circuit.
Inventors:
Masaki Hiragata
Satoshi Takizawa
Seiki Igarashi
Satoshi Takizawa
Seiki Igarashi
Application Number:
JP19152899A
Publication Date:
April 27, 2005
Filing Date:
July 06, 1999
Export Citation:
Assignee:
Fuji Electric Equipment Control Co., Ltd.
International Classes:
H02M7/537; (IPC1-7): H02M7/537
Domestic Patent References:
JP10257779A | ||||
JP9140162A | ||||
JP4021185U |
Attorney, Agent or Firm:
Iwao Yamaguchi
Yoshihide Komada
Kiyoshi Matsuzaki
Yoshihide Komada
Kiyoshi Matsuzaki