PURPOSE: To provide an asynchronous counter circuit capable of surely performing counting by using an inexpensive asynchronous counter.

CONSTITUTION: The BO terminal (least significant bit) of a digital comparator 26 is set at high. When a four-bit asynchronous counter 22 counts '8' and a most significant third bit is switched to high, even when a least significant 0-th bit becomes high by delay, the digital comparator outputs output signals when the third bit of the four-bit asynchronous counter 22 is switched to high since the BO terminal (the least significant bit) is fixed at high. A D flip-flop 30 latches the signals.