Title:
AUDIO TAPE REPRODUCING CIRCUIT
Document Type and Number:
Japanese Patent JP3641792
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enhance an offset stability with respect to the high frequency noise of an operational amplifier circuit by inserting a resistance suppressing high frequency pulses from being formed in series between the common emitters of first and second bipolar transistors and the collector of a third bipolar transistor.
SOLUTION: The high frequency noise N due to the burst transmission of a portable telephone is applied on the base of a transistor Q11 through the input line of an equalizer amplifier 1. The resistance R4 being interposed in series between the common emitters of transistors Q11, Q12 and the collector of a transistor Q14 suppresses the high frequency pulses from being formed between the emitter of the transistor Q14 and a power source line Vcc and consequently an offset current due to the detection current of the high frequency noise is reduced and an audible noise to be generated with the burst cycle of the high frequency noise is remarkably reduced. Thus, a resistance to noise is enhanced without the fear of erroneous recordings with respect to a magnetic tape with a simple constitution by adding the resistance R4 in the operational amplifier circuit 11.
Inventors:
Katsuhisa Matsuda
Hideki Nagumo
Hideki Nagumo
Application Number:
JP32765497A
Publication Date:
April 27, 2005
Filing Date:
November 28, 1997
Export Citation:
Assignee:
Renesas Technology Corp.
Hitachi Super LSI Systems Co., Ltd.
Hitachi Super LSI Systems Co., Ltd.
International Classes:
G11B5/027; G11B5/035; (IPC1-7): G11B5/035; G11B5/027
Domestic Patent References:
| JP6204755A |
Attorney, Agent or Firm:
Tomio Dainichi