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Title:
AUTOMATIC INITIALIZATION TYPE FREQUENCY DIVIDER
Document Type and Number:
Japanese Patent JP2006229957
Kind Code:
A
Abstract:

To provide an automatic initialization type frequency divider for a high-frequency clock.

A frequency divider is a closed loop system having a re-circulation storage element 100, at least one feedback storage element 102, and an end storage element 104 connected in series. Each storage element 100, 102, and 104 receives a common clock 106. The logical sum of the end storage element output 112 and at least one of other storage element outputs 114 is supplied to the input 112. Consequently the automatic initialization state machine is formed.


Inventors:
ROBAATO EICHI MIRAA JIYUNIA
Application Number:
JP2006032705A
Publication Date:
August 31, 2006
Filing Date:
February 09, 2006
Export Citation:
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Assignee:
AGILENT TECHNOLOGIES INC
International Classes:
H03K23/00; H03K23/64
Domestic Patent References:
JPH02223224A1990-09-05
JPH04274616A1992-09-30
JPH02223225A1990-09-05
JPH0410811A1992-01-16
JPH0884069A1996-03-26
JPH09307430A1997-11-28
JPS59210729A1984-11-29
JPS5446463A1979-04-12
JP2001519616A2001-10-23
JPS56165436U1981-12-08
JPS59210723A1984-11-29
JPH01303926A1989-12-07
Attorney, Agent or Firm:
Satoshi Furuya
Takahiko Mizobe
Kiyoharu Nishiyama



 
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